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AI data centers need both fast memory and large persistent storage because they do different jobs. High-bandwidth memory (HBM) feeds accelerators while they compute, server DRAM holds active working data, and NAND flash in solid-state drives stores datasets, models, checkpoints, and outputs. The right balance depends on the workload and system design—not on a single universal memory ratio.
What DRAM and NAND do in an AI data center
AI systems move information through a hierarchy. Data used immediately sits in faster memory close to processors; larger collections that must survive shutdown reside in storage. Micron describes data-center AI deployments as combining HBM, DRAM, and high-performance SSDs to meet different bandwidth, capacity, latency, and power-efficiency needs (Micron’s overview of AI data-center memory and storage).
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| Tier | Main role | Bandwidth and latency | Capacity and persistence | Power and cost/density |
|---|---|---|---|---|
| HBM (DRAM) | Feeds data to an accelerator during computation | Very high bandwidth and close coupling to the accelerator; used where data movement can otherwise leave compute waiting | Working memory, not a substitute for all server memory or persistent storage | Selected for performance near the processor; a universal cost or power comparison is not stated by the cited sources |
| Server DRAM | Holds active data, parameters, and runtime operations across the server | Working-memory tier that complements accelerator-attached HBM | Active working set; volatile rather than persistent storage | A universal cost, density, or power comparison is not stated by the cited sources |
| NAND flash in SSDs | Stores training data, model files, checkpoints, and other large collections | High-performance SSDs can support data ingestion and retrieval, but do not serve as tightly coupled accelerator memory | Persistent storage with capacity for larger collections | Offers a storage tier; a universal cost or power comparison is not stated by the cited sources |
These distinctions matter: HBM and server DRAM are forms of volatile memory, while NAND SSDs retain data without power. Micron and SK hynix describe the tiers as complementary parts of an AI infrastructure stack, not interchangeable alternatives (Micron; SK hynix’s AI memory roadmap).
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Training: keep accelerators supplied
Training repeatedly processes model parameters and large datasets. HBM’s high bandwidth and proximity to an accelerator help supply the data needed for parallel computation. Server DRAM supports the broader server working set, while SSDs hold source datasets and checkpoints. If data cannot reach compute quickly enough, expensive accelerators can spend time waiting rather than processing it.
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Inference: serve requests and retrieve context
Inference runs a trained model to answer requests. It uses fast working memory for active operations, but systems may also need to retrieve models, context, search data, and application information. At larger scale or with more context-heavy workloads, the size and retrieval efficiency of persistent storage matter alongside memory bandwidth. The exact mix varies with the model, architecture, and workload (SK hynix’s discussion of AI memory needs).
Data movement is part of the design problem
Adding compute alone does not solve the problem of storing and moving data to the right place at the right time. The system has to balance accelerator memory, server memory, storage capacity, retrieval speed, and power against its particular workload. Micron identifies data ingestion and processing as roles for data-center SSDs, and names its Micron 9650 NVMe SSD and 6600 ION NVMe SSD as examples. These are enterprise data-center products, not default recommendations for consumer PCs (Micron’s data-center SSD overview).
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.How large is the demand increase?
There is no verified, directly comparable figure here for how many times more DRAM and NAND an AI server uses than a non-AI server. A single multiplier would also obscure differences among system designs and workloads.
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Market forecasts illustrate the scale of expected growth, but they should be read with their attribution intact. In a July 2026 article, SK hynix reported 2026 revenue-growth forecasts of 92% for HBM and 60% for server DRAM, attributed to Gartner, and 130% for eSSD, attributed to Omdia. These are forecasts as reported by SK hynix, not measured growth or an independent comparison of memory quantities (SK hynix, July 2026).
Micron’s FY2026 third-quarter SEC filing says AI-driven data-center growth accelerated memory and storage demand beyond the company’s and industry’s ability to increase supply. Micron also said robust DRAM and NAND demand combined with constrained supply contributed to improved pricing and margins. That filing documents Micron’s own business and market conditions; it is not an independent measurement of total industry demand (Micron FY2026 third-quarter filing).
What may come next: High Bandwidth Flash
SK hynix discusses High Bandwidth Flash (HBF), a NAND-based layer intended to sit between HBM and SSDs. It is an emerging concept under development, not a mature, broadly deployed replacement for either HBM or SSDs. A roadmap or technology discussion should not be read as evidence that HBF is already a standard data-center tier (SK hynix’s roadmap).
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