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Choose the semiconductor for the converter stage rather than for the product label. A system can use SiC in a high-voltage front end, GaN in a high-frequency isolated DC/DC stage and silicon elsewhere. The sections below show how to make that decision using published device ranges and vendor examples, while keeping those figures in their proper context.
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What SiC and GaN change compared with silicon
SiC and GaN are wide-bandgap semiconductor materials. Their electrical properties can support lower switching and conduction losses than many conventional silicon MOSFET designs, allowing higher efficiency, higher switching frequency or a smaller thermal and magnetic design. That does not make every SiC or GaN part better than every silicon part: voltage rating, die size, package, gate driver, topology and operating point determine the result.
Texas Instruments’ fourth-quarter 2020 technical overview describes SiC and GaN as serving different voltage, power and application needs while overlapping in some equipment. It associates SiC with high-voltage, high-current conversion and GaN with many high-frequency applications. Because that article is a vendor-authored overview from 2020, treat its boundaries as historical guidance rather than current maximum ratings.
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| Decision factor | SiC tendency | GaN tendency | What the designer must verify |
|---|---|---|---|
| Voltage and power | Strong candidate for high-voltage, high-current and high-power stages | Strong candidate for low- to medium-voltage, high-frequency and power-density-driven stages | Individual device blocking voltage, current, short-circuit behavior, switching conditions and required design margin |
| Switching frequency | Can operate at high frequency; vendor examples include 100 kHz totem-pole PFC and 200–300 kHz soft-switching LLC | Often selected when very high frequency is central to reducing magnetics and converter size | Losses at the intended frequency, topology, dead time, gate resistance and parasitic inductance |
| Typical architecture | Vertical devices and modules are common in high-power equipment | Lateral devices are common at lower voltages; vertical architectures extend to higher voltage | Package thermal resistance, isolation, creepage, gate-drive requirements and qualification data |
| System economics | Higher device price can be offset by smaller passives, cooling hardware or higher usable power | Higher-frequency operation can reduce magnetic and filter size, but layout and drive requirements may add cost | Total bill of materials, manufacturing complexity, reliability targets, volume and supply continuity |
Start with the converter stage, not the material
Write down the electrical and mechanical requirements for the specific stage before comparing part numbers. At minimum, record:
- Nominal, minimum and maximum bus voltage, including transients and surge conditions.
- Output voltage, RMS and peak current, continuous and overload power, and duty-cycle range.
- Topology: hard-switched bridge, resonant LLC, totem-pole PFC, buck, boost, half-bridge, full-bridge or another arrangement.
- Target switching frequency and whether soft switching is available over the operating range.
- Isolation, creepage, clearance, functional-safety and regulatory requirements.
- Cooling method, allowable junction temperature, ambient range and enclosure limits.
- Production volume, service life, second-source needs and the availability of qualified devices.
A 650 V GaN transistor may be ideal in one 400 V bus converter and unusable in another if its transient margin, short-circuit rating or package cannot meet the design. A 1,200 V SiC module may be electrically comfortable but unnecessarily expensive and physically large in a compact low-voltage converter. Ratings must come from the current datasheet for the exact device and package.
Voltage and power: the first filter
How the published ranges differ
TI’s 2020 overview describes SiC devices reaching 1,200 V with high current-carrying capability. It characterizes GaN FETs as typically 600 V. Those statements describe the products and market view available when the article was written, not universal limits.
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onsemi’s technology page, consulted October 13, 2026, gives a more differentiated description: lateral GaN is commonly used from approximately 30 V to 650 V, with some designs approaching 900 V, while vertical GaN is typically above 900 V and can extend beyond 1,200 V. The discrepancy with the older 600 V summary reflects different dates and device architectures. Do not merge the ranges into a single “GaN limit.” Select by the datasheet’s rated voltage, dynamic voltage behavior and qualification conditions.
Bus voltage is not the same as device rating
The switch must withstand the highest drain-to-source or collector-to-emitter stress, not merely the nominal DC bus. Add ringing, leakage-inductance spikes, line surges, regenerative events and control faults to the calculation. A half-bridge, boost stage and isolated bridge expose devices to different stresses even when they share the same bus voltage.
Use the manufacturer’s recommended derating and transient limits. Check whether the stated rating applies continuously, only at a specified temperature, or under a particular switching test. For high-voltage systems, also verify package creepage and clearance, insulation system, partial-discharge behavior and the voltage rating of the gate driver and isolated power supply.
Current and power determine the practical package
Current rating is constrained by conduction loss, pulse duration, thermal impedance, bond wires or package interconnects and the cooling system. A device with a large headline current may need substantial heat sinking or parallel operation. Compare conduction loss at the actual RMS current and temperature rather than comparing only the maximum current line in a table.
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Switching frequency and topology
Why GaN is often chosen for compact high-frequency stages
Higher switching frequency can reduce the size of inductors, transformers and filters, which is why GaN is associated with power-density-driven designs. onsemi describes GaN applications including intermediate-bus conversion, isolated DC/DC, point-of-load regulation, motor drives and actuation. In these stages, the value of fast switching is realized only if the magnetics, layout, driver and control loop can operate at the target frequency.
Fast transitions also increase sensitivity to common-source inductance, gate-loop inductance, switch-node capacitance, electromagnetic interference and timing errors. A GaN design therefore needs a short, controlled commutation loop, an appropriate driver and a layout that keeps high-dv/dt nodes away from sensitive circuits. The resulting engineering effort is part of the technology choice, not an afterthought.
Where SiC still switches quickly
SiC is not limited to slow switching. In a July 2023 article, onsemi gives a SiC totem-pole PFC example at 100 kHz and a soft-switching LLC example at 200–300 kHz. These are vendor examples under particular topology and operating assumptions, not universal operating recommendations. They demonstrate that SiC can support high-frequency designs when its voltage and power advantages outweigh the cost or size of a GaN implementation.
Soft switching changes the comparison
Zero-voltage or zero-current switching can reduce turn-on or turn-off losses for either material. Compare devices under the actual resonant or transition conditions, including the energy needed to charge and discharge output capacitance, reverse-conduction behavior, dead time and light-load operation. A technology that looks superior in a hard-switched comparison may lose its advantage when the competing topology achieves soft switching.
Thermal design and packaging
Do not convert a material property into a guaranteed system temperature. Junction temperature is set by total loss and the complete thermal path: semiconductor die, package, interface material, heat spreader, heat sink, airflow or cold plate and enclosure.
Losses to calculate
- Conduction loss: use the device’s temperature-dependent resistance or on-state voltage at the actual current waveform.
- Switching loss: use measured or datasheet energy values at the intended voltage, current, gate resistance, temperature and frequency.
- Drive loss: include gate-charge or input-capacitance energy and the isolated driver supply.
- Dead-time and reverse-conduction loss: account for the interval when the intended channel is off and current flows through the available path.
- Passive loss: include winding, core, capacitor ESR, busbar and snubber losses; reducing semiconductor loss can expose these as the new limit.
Package construction can be as important as the material. Check thermal resistance from junction to case or board, allowable soldering profile, isolation options, creepage, vibration qualification and the manufacturer’s recommended mounting conditions. For modules, evaluate current sharing, gate-loop symmetry and the thermal interface across the baseplate.
Total system cost: why a more expensive switch can still win
Device price is only one line in the bill of materials. A faster or lower-loss switch may reduce the size of magnetics, capacitors, heat sinks, fans, EMI filters and enclosure. It may also increase the cost of the driver, insulation, control hardware, shielding, validation and manufacturing.
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onsemi’s 2023 SiC article presents a generic 30 kW silicon-based example in which inductors account for 60% of the overall bill of materials, capacitors 30% and semiconductor devices 10%. The company says that, in that example, replacing silicon MOSFETs with SiC switches allows capacitance and inductance to be reduced by 75%. These are illustrative assumptions from one vendor, not a universal bill-of-materials statistic or a guaranteed saving. Recalculate the entire converter for your own power level, topology, thermal design and production volume.
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TI’s 2020 article also includes a normalized future-cost model with a superjunction MOSFET baseline of 1.0, GaN at 1.3 and SiC at 2.4. The model excludes depreciation and is historical; it should not be read as current retail pricing. For a real program, obtain current quotations, include assembly and test costs, and model the cost of cooling and passive components over the product life.
Application-stage guidance
High-voltage front ends, traction and energy infrastructure
SiC is often the starting candidate for high-voltage, high-power front ends, traction inverters and large three-phase converters. TI lists traction inverters, high-power solar farms and large three-phase grid converters as examples. onsemi lists SiC products for DC fast charging, energy storage, solar inverters and UPS equipment.
For these applications, compare blocking-voltage margin, short-circuit response, overload behavior, module current sharing, cooling and field reliability. A SiC MOSFET or module can be a better fit when the bus and power level make a 650 V-class GaN implementation marginal, even if GaN could switch faster.
Consumer, server and telecom power supplies
TI identifies consumer, server and telecom supplies among GaN application areas. In a compact adapter or high-density server stage, reducing transformer, inductor and heat-sink size may justify the additional layout and gate-drive discipline. Confirm the required isolation voltage, conducted and radiated emissions, surge test levels, production test coverage and thermal performance inside the finished enclosure.
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Intermediate-bus and isolated DC/DC conversion
GaN can be attractive in an intermediate-bus or isolated DC/DC stage where switching frequency directly reduces transformer and filter volume. Evaluate transformer core loss, winding capacitance, leakage inductance and rectification strategy along with the transistor. If the bus voltage is high or fault energy is substantial, SiC may provide a more comfortable voltage and robustness margin.
Motor drives and actuation
onsemi lists motor drives and actuation as potential GaN applications. The choice depends on motor voltage, required electrical frequency, acoustic-noise limits, regenerative events and the controller’s ability to manage fast edges. SiC remains a candidate for higher-voltage drives and harsh environments. Compare inverter loss over the full speed-torque map rather than at one nominal operating point.
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USB Type-C adapters
TI’s overview names a USB Type-C adapter as an example of GaN use. GaN can enable a small charger when high-frequency operation reduces magnetics and thermal hardware, but not every USB Type-C charger uses GaN and no material choice guarantees a particular size, efficiency or price. Product-level decisions still depend on the adapter’s power rating, safety approvals, switching topology and thermal enclosure.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.Mixed-technology architectures
There is no requirement to use one semiconductor material throughout a product. onsemi states that modern power systems often combine silicon, SiC and GaN, optimized by stage rather than replaced wholesale. TI’s overview likewise describes overlap below 10 kW. A practical architecture might use SiC for a high-voltage PFC or battery interface, GaN for a high-frequency isolated converter and silicon for a low-cost auxiliary rail.
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- Map each stage’s bus voltage, current, switching frequency and isolation requirement.
- Identify the stage where switching frequency most strongly reduces passive volume or cooling.
- Identify the stage where voltage margin, fault energy or current capability dominates.
- Shortlist SiC, GaN and silicon devices for each stage using current datasheets.
- Validate control timing, gate drive, EMI, thermal performance and protection at system level.
Mixed architectures can reduce risk, but they add supplier interfaces, different qualification flows and multiple driver technologies. Include those integration costs in the comparison.
A practical selection procedure
- Define electrical extremes. Record minimum and maximum input, output, transient voltage, RMS and peak current, overload duration and ambient temperature.
- Set the topology and switching target. Specify hard or soft switching, dead time, modulation method and the frequency range, including light-load behavior.
- Calculate first-order losses. Estimate conduction, switching, drive, reverse-conduction and passive losses for candidate devices at realistic temperatures.
- Check dynamic ratings. Review dv/dt, di/dt, short-circuit or overload capability, avalanche or unclamped-inductive behavior where applicable, and the manufacturer’s test conditions.
- Design the gate drive and layout. Follow the recommended gate voltage, turn-on and turn-off resistance, Miller management, isolation and decoupling. Simulate or measure the commutation loop and switch-node overshoot.
- Close the thermal loop. Convert calculated loss into junction temperature with the actual package, interface and cooling arrangement. Check hot-spot and transient thermal impedance.
- Price the complete converter. Include passives, heat removal, drivers, EMI components, mechanical changes, assembly, test time, yield and expected service life.
- Qualify the supply chain. Check lifecycle status, lead times, second sources, package availability and the vendor’s qualification data for the intended environment.
- Prototype the highest-risk behavior. Measure switching waveforms, ringing, EMI, thermal rise, light-load operation and protection response before freezing the device choice.
Common selection mistakes and how to avoid them
Treating a voltage headline as a design rule
“600 V GaN” or “1,200 V SiC” does not describe surge margin, package insulation or safe operation in your topology. Use the exact datasheet and include measured switching overshoot.
Comparing frequencies without comparing losses
A higher frequency can shrink magnetics while increasing switching, gate-drive, core and EMI losses. Compare complete converter efficiency and temperature at the load profile that matters.
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Fast devices make parasitic inductance visible. Excessive loop area can create overshoot, false turn-on, ringing and electromagnetic interference. Follow the evaluation-board placement guidance, then re-evaluate it for your mechanical design.
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Assuming lower semiconductor loss means a smaller heat sink
Magnetics, capacitors, drivers and EMI components may become the dominant heat sources. Measure or model every significant loss path.
Using a vendor example as a universal benchmark
The 100 kHz PFC, 200–300 kHz LLC and 30 kW cost illustrations from onsemi demonstrate possible designs under stated assumptions. They are not guaranteed operating points, savings or cross-vendor benchmarks.
Choosing a material before defining fault behavior
Short-circuit response, current limiting, controlled shutdown and restart behavior can determine whether a device survives a fault. Include protection timing and fault energy in the first comparison, not after the prototype fails.
Decision checklist
- Is the maximum device voltage, including transients, comfortably below the candidate’s rated voltage?
- Does the device meet continuous, peak and overload current requirements at the intended junction temperature?
- Are switching and conduction losses calculated for the actual topology and frequency?
- Can the gate driver, isolation and layout control the device’s transition speed?
- Will the thermal path keep the junction within its specified range over ambient and load extremes?
- Do smaller magnetics or filters offset any higher semiconductor and driver cost?
- Are EMI, creepage, clearance, safety and reliability requirements satisfied?
- Is there an acceptable supply, qualification and lifecycle plan?
- Would a mixed SiC, GaN and silicon architecture produce a better system than a single-material design?
Bottom line: how to choose between SiC and GaN
Choose SiC first when the stage is high-voltage, high-power, current-intensive or exposed to substantial fault and transient energy. It is a frequent fit for traction, solar, storage, UPS, charging and grid front ends, subject to the individual device and thermal design.
Choose GaN first when high switching frequency and power density are the main value drivers and the voltage, current, protection and layout requirements fit the available architecture. It is often compelling in compact adapters, server and telecom supplies, intermediate-bus conversion, isolated DC/DC stages and point-of-load designs.
Then challenge the first choice with a complete system model. The best answer may be SiC, GaN, silicon or a combination of them. The deciding evidence is the converter’s measured loss, temperature, EMI, reliability, manufacturability and total cost—not the material name alone.
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