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Integrated Injection Logic (I²L): Definition, How It Works, and Why It Mattered

Integrated injection logic (I²L) is a bipolar logic family that merges a current injector with a switching transistor. Here is how the cell works, why it was developed, and why it became a legacy technology.
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Integrated injection logic (I²L) is a bipolar digital logic family in which a current injector and an inverting switching transistor are built together in one compact integrated structure. The input steers injected current at the switching transistor’s base, and that transistor’s collector provides the output. Its appeal was dense integration at a workable speed and power tradeoff. It is now a historical design style rather than a mainstream one.

What the name means

The same circuit family appears under three names: integrated injection logic, I²L (also written I2L), and merged-transistor logic (MTL). They all refer to one idea: a bipolar logic cell in which the transistor that supplies current and the transistor that switches it are merged or placed very close together in the silicon.

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I²L is a bipolar family. It should not be confused with CMOS, which uses complementary MOS transistors and draws almost no static current in an ideal state. I²L cells draw bias current even when they are not switching, and that difference shapes almost every comparison between the two.

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How an I²L cell works

A simplified I²L cell has two transistors:

  • A lateral PNP injector that supplies current into the base of the switching transistor.
  • A vertical NPN switching transistor whose base receives that injected current and whose collector produces the output.

The logic function comes from steering. Depending on the input condition, the injected current is either diverted away from the switching transistor or allowed to drive it. The switching transistor therefore acts as an inverter in the logic sense. Its output is open-collector: it can sink current to pull the node low, while an external or injected current establishes the high state. This is why tied open-collector outputs can implement wired logic.

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Because the switching transistor can have more than one collector region, a single cell can feed several outputs. The lateral injector and the vertical switch are physically merged or closely integrated, which is what made the cells compact.

Two points are easy to get wrong. First, I²L is not voltage-mode CMOS with different transistors; its mechanism is injected-current steering inside a bipolar structure. Second, “low power” is relative. The cells consume current while static, so they are better described as efficient for their era and density than as low-power in the modern sense.

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Why it was developed

I²L was introduced by Kees Hart and Arie Slob. Their foundational paper, “Integrated injection logic: a new approach to LSI,” appeared in the IEEE Journal of Solid-State Circuits, volume 7, issue 5, pages 346–351, in October 1972. The design goal was large-scale integration with simple cells and a manageable power-delay product.

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In a 1973 review, Hart and Slob argued that the approach could let bipolar integrated circuits approach MOS devices in many respects. That was the authors’ assessment at the time, and it reflects the state of the technology in the early 1970s rather than a current comparison.

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Where I²L was used

A 1987 paper by Mark Grabosky reports that I²L had been used in LSI memories, microprocessors, digital wristwatches, analog-to-digital and digital-to-analog converters, and custom integrated circuits. A 1976 Texas Instruments patent, filed in 1975, describes an I²L random-access memory cell in which a latch keeps current injection active during both read and write operations.

These applications show the range of the family, not its market share. The sources used for this article do not establish how many devices were shipped or what share of logic it held in any given year.

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Performance figures and how to read them

Grabosky’s paper reports propagation delays as low as 63 ns and power consumption as low as 0.01 mW per gate. These figures apply only to the specific developed processes discussed in that paper. They are not general specifications for I²L, and they should not be compared directly with figures for other processes, other years or other logic families.

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The sources reviewed for this article do not include a controlled, same-generation benchmark of I²L against CMOS or other bipolar families. Any claim that one family is faster or lower-power than another therefore depends on the process, bias conditions and generation being compared.

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Comparing I²L with CMOS and other bipolar logic

When comparing I²L with other logic families, use these axes rather than a single verdict:

  • Integration density and process complexity. I²L was valued for compact cells. Its process and the bipolar structures it required are a separate question.
  • Switching speed and power-delay tradeoff. Results depend on the process and bias point, as described above.
  • Static bias current. I²L cells draw current when idle. CMOS in its ideal static state does not, which is the central reason CMOS displaced it.
  • Output structure and interfacing. The open-collector output enables wired logic but requires an external pull-up or injected current to define the high state.
  • Historical availability. Whether a process for I²L is available today is a practical question separate from how the circuit works.

Is I²L still used?

As CMOS improved in speed, power and cost, it became the dominant approach to digital logic, and I²L became a legacy technology. The sources used here do not document any current mainstream product built with I²L, and they do not establish current market adoption. If you encounter I²L in a modern design, treat it as a case to verify directly rather than assume.

Key takeaways

  • I²L is a bipolar logic family that merges a current injector with a switching transistor.
  • Logic comes from current steering at the switching transistor’s base, and the output is open-collector, which may have several collectors.
  • Its historical strength was dense integration; its main limitation was static bias current.
  • Numerical results belong to the specific process and paper that reported them.

For readers working on the original literature, the 1972 Hart and Slob paper is the primary source for the circuit concept. The 1973 review and the 1987 Grabosky paper provide accessible historical context.

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