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Buy the platform around your model, not the chassis around a number of GPU slots. GPU memory and the interconnect between accelerators determine whether a model fits and whether additional GPUs improve throughput. Networking, power delivery and cooling then determine whether that platform can run reliably in your rack.
For an eight-GPU system, validate the complete design with the OEM or integrator: GPU and HBM capacity, NVLink/NVSwitch or Infinity Fabric, PCIe lane allocation, NIC topology, switch speeds, redundant PSUs, rack power and the air or liquid cooling loop. A server that merely lists the right GPU can still be unsuitable for training.
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Start with the workload, model and memory requirement
The first buying decision is not H100 versus MI300X or 4 GPUs versus 8. It is the amount and type of memory your workload needs, followed by the way GPUs exchange data. Write down the model size, numerical precision, batch size, context length, sequence-parallel or tensor-parallel strategy, and whether jobs stay on one node.
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Weights are only one part of training memory. Optimizer states, gradients, activations, temporary workspaces, communication buffers and the operating stack also consume memory. Inference needs room for the model, the key-value cache and concurrent requests; a longer context or larger batch can make the cache the dominant allocation.
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- Inference: budget for weights at the selected precision, the KV cache at your target context and concurrency, framework overhead and headroom for peaks.
- Fine-tuning: add gradients, optimizer state and activation memory. Parameter-efficient methods reduce, but do not eliminate, these allocations.
- Full training: include all optimizer and gradient copies, activation checkpointing choices and distributed-training buffers.
Use the aggregate HBM figure only when the software can distribute the model efficiently. Eight GPUs with separate memory pools are not automatically equivalent to one very large pool; tensor, pipeline or sequence parallelism must move data across the accelerator fabric.
Choose the interconnect before the chassis
Within a node, NVLink/NVSwitch on NVIDIA systems and Infinity Fabric on the MI300X platform provide much higher peer-to-peer bandwidth than an ordinary PCIe path. That matters for tensor-parallel layers, all-reduce operations and frequent parameter exchanges. A platform with more HBM but a weak interconnect can lose its advantage when the model is split across GPUs.
For multi-node jobs, the same principle applies between servers. East-west traffic carries gradients, activations and synchronization; a low-bandwidth or poorly mapped network can leave expensive GPUs idle. Confirm the communication library, GPU-to-NIC path and switch design as part of the platform selection.
Compare the two major eight-GPU platform approaches
The following figures describe the reference platforms in the supplied vendor documentation. Actual systems vary by chassis, CPU, NIC, storage and power configuration, so request a system-specific bill of materials.
| Design axis | NVIDIA HGX/DGX H100, H200 and B200 family | AMD Instinct MI300X |
|---|---|---|
| GPU arrangement | HGX reference designs use 4 or 8 GPUs; DGX systems use 8 | Eight passive OAM GPUs on an UBB 2.0 platform |
| Accelerator memory | Up to 640 GB on an H100 eight-GPU node; up to 1,128 GB on an H200 eight-GPU node | 1.5 TB total HBM3, or 192 GB per GPU |
| Intra-node fabric | NVLink/NVSwitch; the DGX H100 datasheet cites 900 GB/s GPU-to-GPU bandwidth | Infinity Fabric with 896 GB/s aggregate peer-to-peer I/O |
| Compute-network guidance | More than 200 GB/s minimum aggregate bandwidth and 400 GB/s recommended for an eight-GPU node | PCIe 5.0 x16 and an OEM-designed network topology; verify NIC placement and bandwidth for the workload |
| Power and thermal design | DGX H100 lists approximately 10.2 kW maximum system power; rack-level thermal planning is required | 750 W peak per MI300X accelerator; passive OAM cooling depends on the host chassis or liquid loop |
| Typical fit | CUDA-centered training, inference and dense multi-node clusters | High-memory AI and HPC workloads using ROCm and large HBM capacity |
Neither column is a universal winner. Software compatibility, memory per GPU, interconnect behavior, available service support and facility limits should decide the purchase.
Networking: when 200 GB/s or 400 GB/s matters
NVIDIA’s current HGX AI Factory guidance sets more than 200 GB/s as the minimum aggregate compute-network bandwidth and 400 GB/s as the recommendation for an eight-GPU node. These are aggregate compute-network figures, not a promise that a single application flow will receive that rate.
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- PCIe 3.0 x16 Interface — 250W TDP — Standard PCIe Gen3 connectivity with passive cooling designed for enterprise rack server deployment in HPE ProLiant, Dell PowerEdge, and Supermicro platforms with adequate chassis airflow
- NVLink — Scale to 96GB Unified Memory — Connect two V100 GPUs via NVLink at 300 GB/s bi-directional bandwidth to scale GPU memory from 32GB to 96GB for larger AI training and HPC workloads
- Multi-Precision Computing — Supports FP64 (7 TFLOPS), FP32 (14 TFLOPS), FP16 (112 TFLOPS) and INT8 precision modes for flexible deployment across training, inference, and scientific simulation workloads
Translate the requirement correctly
Bandwidth in the guidance is expressed in bytes per second. 400 GB/s is approximately 3.2 Tb/s of bidirectional byte-to-bit capacity, while 200 GB/s is approximately 1.6 Tb/s. The exact NIC count, link speed and whether the specification is measured per direction must be confirmed in the OEM design. Do not substitute a single “400 Gb/s NIC” for a 400 GB/s node requirement; those units differ by a factor of eight.
Use high-bandwidth networking for the right jobs
- Single-GPU or lightly coupled inference: network demand may be modest unless requests are distributed across many servers or the KV cache is remote.
- Single-node tensor parallelism: the internal GPU fabric is usually the critical path, but storage and external service traffic still need dedicated capacity.
- Multi-node training: all-reduce and parameter traffic make east-west bandwidth and latency central to scaling efficiency. Use the vendor’s minimum as a floor and the recommended figure when the workload is communication-heavy.
Check topology, not just port labels
Ask for a diagram showing every GPU, NIC, PCIe root complex, switch and cable. A NIC attached through a congested or remote PCIe path can underperform even when its port rating looks adequate. Verify GPU-to-NIC affinity, NUMA placement, GPUDirect or equivalent support, switch radix, oversubscription and the maximum cable distance for the selected optics.
For AMD systems, the MI300X platform specifies PCIe 5.0 x16 and leaves network implementation to the OEM. Require the proposed NIC model, lane allocation and ROCm-supported communication path in writing rather than assuming that an NVIDIA-oriented topology transfers unchanged.
Power delivery: design for sustained load, not the nameplate alone
Power is a facility constraint before it is a software setting. NVIDIA’s DGX H100 datasheet lists approximately 10.2 kW maximum system power. That is the complete system maximum cited by NVIDIA, not merely the GPU-board draw, and it should be used for breaker, PDU, UPS and cooling planning unless the integrator supplies a different validated figure for the exact configuration.
Understand the MI300X power number
AMD specifies 750 W peak board power for each MI300X accelerator. Eight accelerators therefore represent up to 6 kW of accelerator-board peak power before CPUs, memory, NICs, fans, pumps, storage and PSU losses are included. The final server rating must come from the host manufacturer; do not add eight 750 W cards to a generic workstation PSU and assume the result is safe.
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- Server input: obtain maximum and typical draw for the exact GPU, CPU, memory, NIC and storage configuration, including startup behavior.
- PSU configuration: confirm the number, wattage and efficiency of PSUs and whether they are N+1 or otherwise redundant. Ask what performance remains after one PSU fails.
- Rack circuit: check voltage, phase, breaker rating, receptacle type and the continuous-load policy used by your facility.
- PDU and UPS: reserve capacity for other equipment and account for UPS efficiency, battery runtime and generator transfer. Keep operating headroom rather than sizing to the trip point.
- Rack total: multiply the validated per-server maximum by the planned population and add switches, storage, management nodes and conversion losses.
DGX B200 documentation notes degraded operation after a PSU loss, making redundancy an operational concern rather than a checkbox. Your integrator should document the failure behavior, alarms and replacement procedure for the proposed system.
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Cooling and rack integration
Every watt consumed becomes heat that the room or liquid loop must remove. A 10.2 kW DGX H100 maximum is roughly 34,800 BTU/h by direct unit conversion, before adding neighboring servers and facility losses. Use the OEM’s thermal design power and airflow or coolant specifications, not a generic “one rack unit” assumption.
Air-cooled designs
Air cooling can work when the chassis, fans, rack containment and room distribution are designed together. Confirm inlet-temperature limits, required airflow, acoustic limits, hot-aisle or cold-aisle orientation and the pressure drop across the rack. High-density eight-GPU systems may exhaust far more heat than a conventional CPU rack, so a room-level HVAC check is essential.
Liquid-cooled designs
Direct-to-chip or rear-door liquid systems can remove high heat density with less room airflow, but they add pumps, manifolds, quick disconnects, coolant quality requirements and leak-management procedures. Confirm supply and return temperatures, flow rate, facility water chemistry, CDU capacity and what remains air-cooled, such as memory, storage and power supplies.
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1Repair Windows errors before they cause bigger problems2Fix the driver behind crashes, sound loss and screen glitches3Clear out junk files and repair common Windows errorsWhy passive MI300X cards require an engineered chassis
MI300X accelerators are passive OAM modules. They rely on the host’s fans, ducts, heatsinks or liquid cold plates rather than carrying a workstation-style cooling solution themselves. The chassis thermal solution is therefore part of the accelerator specification. Require the OEM’s airflow or coolant validation, allowable inlet conditions and service procedure; a bare OAM module is not a drop-in PCIe add-in card.
Server architecture details to confirm before ordering
Form factor and service access
Confirm rack height, rail compatibility, front-to-back airflow, cable bend radius, top-of-rack clearance and the weight of the populated chassis. Ensure technicians can replace a GPU, NIC, fan, pump, drive or PSU without removing unrelated equipment. Ask whether the system is field-serviceable in your data center or requires depot service.
PCIe Gen5 lane allocation
Document which CPU root complex owns each GPU and NIC, how many Gen5 lanes are available, and whether storage or additional adapters steal lanes from the accelerator fabric. BIOS settings, NUMA exposure and firmware versions should be listed in the support matrix. A nominal Gen5 slot does not guarantee full-bandwidth connectivity in the populated configuration.
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Software and firmware support
Request a matrix covering GPU firmware, system BIOS, BMC, NIC firmware, CUDA or ROCm versions, kernel support, container runtime and the communication libraries used by your framework. Define who supplies security updates and how versions are tested before production rollout.
How to choose between NVIDIA HGX/DGX and AMD MI300X
Choose the NVIDIA path when the software stack is CUDA-centered
HGX and DGX reference systems combine four or eight accelerators with NVLink/NVSwitch and an established NVIDIA software ecosystem. The DGX H100 datasheet cites 900 GB/s GPU-to-GPU bandwidth, while the HGX guidance specifies the 200 GB/s minimum and 400 GB/s recommended compute-network bandwidth for an eight-GPU node. This combination suits organizations whose training, inference and monitoring tools are already validated on CUDA and whose jobs scale across tightly coupled nodes.
NVIDIA describes DGX H100/H200 systems as “universal systems purpose-built for all AI infrastructure and workloads from analytics to training to inference.” Treat that as a platform positioning statement, then verify that your own framework, kernels and model parallelism are supported at the versions you will deploy.
Choose MI300X when memory capacity and ROCm fit the priority
The eight-GPU MI300X platform provides 1.5 TB of total HBM3, with 192 GB per GPU, and 896 GB/s aggregate peer-to-peer I/O through Infinity Fabric. That large memory pool can reduce model sharding pressure for workloads that are validated on ROCm. The trade-off is a highly integrated UBB 2.0 design with passive 750 W OAM accelerators, so chassis cooling, NIC topology and service support must be approved as one system.
AMD states that “The AMD Instinct™ MI300X platform is designed to deliver exceptional performance for AI and HPC.” Confirm the exact ROCm release, framework operators, custom kernels and profiling tools required by your models before committing.
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- Write a workload brief. Record model parameters, precision, context, batch, concurrency, training duration, checkpoint size and target number of nodes.
- Set a memory and interconnect target. Select per-GPU HBM, aggregate capacity and the internal fabric before comparing chassis dimensions.
- Decide single-node or multi-node. If training crosses nodes, specify the required aggregate compute-network bandwidth and latency behavior.
- Request two complete system designs. Each quote should list GPUs, HBM, CPUs, DIMMs, NICs, switches, drives, PSUs, fans or liquid components, rails and cables.
- Review the topology diagram. Check GPU-to-NIC affinity, PCIe Gen5 lanes, NUMA domains, switch speed, oversubscription and cable types.
- Run the facility review. Give the data-center team maximum and typical power, voltage, phase, heat load, airflow or coolant requirements, weight and noise.
- Negotiate the support boundary. Identify who supports the integrated stack, replacement-time targets, spare parts, firmware updates and escalation for GPU, NIC or cooling faults.
- Write acceptance tests into the purchase order. Include GPU enumeration, memory tests, peer-to-peer bandwidth, network throughput, collective-communication tests, sustained power and thermal soak, and PSU-failure behavior.
Common buying mistakes and how to avoid them
Buying by GPU model alone
A listing that names an H100 or MI300X may omit HBM capacity, board type, interconnect, PSU count, NICs or cooling. Demand the exact part numbers and a validated system configuration.
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Confusing aggregate and per-link bandwidth
“400 GB/s recommended” for an eight-GPU node is an aggregate compute-network target. Ask whether the vendor means total bidirectional capacity, per direction or usable application throughput, and map that definition to the NIC and switch design.
Assuming a normal rack can absorb the heat
High-density GPU servers can exceed the power and airflow assumptions of a CPU rack. Complete the electrical and thermal review before delivery, and reserve rack space for cable management and service access.
Ignoring failure operation
Redundant PSUs, fans, pumps and network paths matter only if the system’s behavior after a fault is documented. Ask whether jobs stop, continue at reduced performance or require a reboot after a component fails.
Treating a marketplace listing as a specification
Use marketplace listings only to identify possible suppliers. Before payment, verify seller identity, warranty jurisdiction, GPU and PSU serials, NIC and switch configuration, firmware support and the integrator’s acceptance-test obligations.
Acceptance checklist for delivery
- All GPUs appear with the promised memory capacity and firmware.
- NVLink/NVSwitch or Infinity Fabric links show the expected topology and peer-to-peer bandwidth.
- NICs are attached to the documented PCIe root complexes and achieve the quoted throughput in both required directions.
- Collective-communication tests complete at the target message sizes without errors or repeated link retries.
- A sustained workload reaches the expected operating point without thermal throttling, fan faults or coolant alarms.
- Power telemetry records maximum draw, PSU load sharing and the alarm state after a controlled PSU or fan test.
- BIOS, BMC, GPU, NIC, CUDA or ROCm and driver versions match the support matrix.
- The integrator delivers schematics, rack dimensions, cable maps, spare-part numbers and escalation contacts.
What a good quote should contain
There is no universal purchase price for an AI GPU server because GPU generation, HBM, CPU, memory, NICs, switches, storage, cooling and support contracts change the total substantially. Require a line-item quote and a recurring-support schedule rather than comparing a bare GPU price with a validated cluster node.
The quote should state the exact accelerator and board type, total and per-GPU memory, internal fabric, CPUs and DIMMs, NIC and switch models, PSU redundancy, maximum and typical power, cooling method, rack dimensions, firmware and driver versions, warranty terms, spare strategy, delivery region and acceptance tests. If any value is not stated, treat it as an open requirement rather than an assumed capability.
Final decision framework
Buy the smallest validated platform that meets the model’s memory, interconnect and scaling target with facility headroom. An NVIDIA HGX or DGX design is a sensible starting point when CUDA compatibility and tightly coupled multi-node training dominate. An AMD MI300X design is compelling when 1.5 TB of HBM3 and 192 GB per accelerator fit a ROCm-validated workload, provided the OEM supplies the passive-card cooling and network design.
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In either case, the purchase is successful only when the GPU platform, NIC topology, switches, PSUs, rack circuits, cooling loop and service plan are engineered and tested together.
Quick Recap
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