Before selecting an FPGA for flight, check whether evidence for the specific device and implemented design matches your mission’s radiation environment, operating life, availability needs, recovery strategy, and assurance requirements. “Space-grade” or “radiation-tolerant” is not, by itself, proof that a part is suitable for a particular mission. Treat the choice as a mission-specific assurance case—not a label check.
1. Define the mission and the risk you can accept
Start with the mission profile, not a shortlist of parts. Radiation exposure and the consequences of a fault depend on where and how the spacecraft operates, how long it operates, what shielding is assumed, and what the FPGA controls. NASA describes radiation hardness assurance (RHA) as an iterative process spanning environment definition, part selection and testing, spacecraft layout, radiation-tolerant design, and requirements. It recommends integrating that work early.
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- Record the orbit or trajectory, expected exposure, mission duration, shielding assumptions, and relevant operating modes.
- Identify the functions implemented in the FPGA, including safety-critical functions and dependencies on other hardware or software.
- Set system-level reliability and availability objectives, including the effect of an interruption, degraded operation, reset, or loss of the FPGA function.
- Document the project’s risk and margin criteria with the responsible engineering and assurance authorities.
There is no universal radiation threshold that makes an FPGA acceptable for every mission. NASA’s RHA guidance treats the choice as a trade among mission environment, application, lifetime, technical options, and resources.
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2. Check which radiation effects the evidence covers
Do not assess a candidate using total ionizing dose alone. NASA identifies three broad concerns for active electronics: single-event effects (SEE), total ionizing dose (TID), and total non-ionizing dose (TNID). NASA’s programmable logic device guidance further distinguishes several SEE outcomes:
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- Single-event upsets (SEUs): particle-induced changes to stored data or configuration that may be recoverable but can alter operation.
- Single-event transients (SETs): transient errors that can propagate through logic or interfaces.
- Single-event latchup (SEL): a potentially destructive condition that may require power intervention.
- Other SEE outcomes: NASA’s overview also notes that radiation can produce potentially permanent effects.
- TID: cumulative ionizing-dose effects that can degrade or alter device behavior over time.
- TNID: another radiation effect NASA identifies as relevant to active electronics.
For each candidate, obtain the actual test reports and establish what they cover: device revision, lot and package, test method and conditions, operating state and bias, data interpretation, margins, and known limitations. Compare TID results with the mission environment profile and verify that the project’s required operational margin is met. Make the same mission-specific comparison for applicable SEE and TNID evidence; do not infer coverage from a product label or an isolated test result.
A reported ESA example illustrates why context matters: its account of the RTG4 design says it performed as expected under heavy-ion irradiation, with many corrected errors and a very small number of design resets. That finding describes the reported design and test context; it does not establish that every RTG4 implementation—or any FPGA—is suitable for every flight system.
3. Evaluate the device architecture and the implemented design together
Radiation response depends not only on the device, but also on how the design uses it and what the surrounding system does when a fault occurs. NASA’s PLD guidance lists techniques such as triple modular redundancy (TMR), error detection and correction (EDAC), and hardened or radiation-tolerant components. None should be treated as an automatic guarantee: effectiveness, overhead, and interactions must be demonstrated for the actual design.
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If the FPGA stores configuration in SRAM
ESA notes that SRAM-based reprogrammable FPGAs keep configuration data in upset-sensitive SRAM. Determine how the design detects, corrects, scrubs, or recovers from configuration upsets, and whether user state, control logic, and recovery mechanisms are protected. Check for common-mode failure paths—for example, whether a fault could defeat both the function and the logic intended to detect or correct it.
Fault injection can help test these questions. ESA describes FLIPPER as a means of injecting SEU-like faults into user flip-flops, configuration memory, and reconfiguration control registers. Use such testing to examine the design’s fault response; it does not replace device-specific radiation characterization.
If the part is not radiation-hard by design
Assign clear owners and evidence for mitigation at both design and system levels. ESA-hosted workshop material identifies SEU, SET, single-event functional interrupt (SEFI), SEL, and TID as areas to assess for such a part, and warns that mitigation effort can affect availability. Treat this workshop material as technical context, not as a project requirement.
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ESA’s mitigation handbook describes more than 75 techniques, organized into 10 groups and 4 levels, and discusses validation and technique selection. ESA characterizes the handbook as guidance rather than requirements. Use it to inform a tailored mitigation plan, then verify the selected measures against the project’s requirements.
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Define the system’s response to detected and undetected faults before flight. For each relevant fault path, establish whether the function continues, degrades, resets, switches to a backup, or requires ground intervention. Identify which functions are safety-critical and what system behavior is acceptable during recovery.
If in-flight reconfiguration is required, NASA’s PLD guidance calls for a documented plan that addresses incomplete or corrupted updates and system vulnerabilities during reconfiguration. Consider fallback or rollback and redundant configurations where they fit the design. Align update procedures with mission operations and requirements.
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NASA also calls for pre-launch system-level ground testing to confirm the reconfiguration process’s reliability, timing, and safety. Exercise normal and off-nominal operation, including fault-injection cases for safety-critical PLD work, and verify the complete response path—not just that an update can be loaded.
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Collect evidence that connects requirements to the exact device, design, tests, and review decisions. A useful package includes:
- Requirements traceability and the project’s radiation strategy.
- Design, verification, and validation plans and results, including radiation analyses and test reports.
- Fault-response, recovery, and any in-flight update procedures, with system-level test results.
- Device and design configuration identification, applicable lot information, and change-control records.
- Anomaly reports and dispositions, residual-risk decisions, and milestone review records.
ESA identifies ECSS-E-ST-20-40C for engineering and ECSS-Q-ST-60-03C for product assurance in ASIC, FPGA, and IP-core development. ESA lists October 11, 2023, as the publication date for those standards. Its overview says ECSS-E-ST-20-40C defines a development flow and expected outputs reviewed at phase ends. ESA also says qualification of a newly developed device involves closing phase reviews; an existing device without adequate evidence of development to the ECSS standards may require further evaluation and qualification testing.
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Confirm with the project’s customer and assurance authority which standards apply and how they are tailored. Do not describe a commercial device as “ECSS qualified” merely because it is marketed for space use.
6. Compare candidates using mission-specific evidence
When comparing two or more devices or implementations, use consistent evidence and criteria rather than ranking them by a “space-grade” label.
| Comparison area | What to establish |
|---|---|
| Mission fit | Environment, lifetime, shielding assumptions, application, and project availability or reliability objectives. |
| Radiation evidence | Device-specific SEE, TID, and TNID coverage, test conditions and limitations, and margin against mission profiles. |
| Configuration technology | How the FPGA stores configuration and how its upset behavior is detected, corrected, or recovered from. |
| Mitigation burden | Design- and system-level measures required, evidence that they work, and their effect on availability. |
| Recovery and updates | Fault response, fallback or rollback, redundancy where applicable, and ground verification of in-flight reconfiguration. |
| Assurance and lifecycle | Development and qualification evidence, configuration and lot controls, review artifacts, and standards tailoring. |
| Performance and power | Candidate-specific data for the actual implementation; do not assume one FPGA class is faster or more power-efficient without comparable evidence. |
NASA’s SpaceCube description is an example of a system strategy: it describes combining commercial radiation-tolerant Xilinx Virtex FPGA technology with upset detection and correction. NASA states that SpaceCube aims for 10x to 100x improvements in onboard computing power compared with traditional fully radiation-hardened flight systems. That is a claim about the SpaceCube system strategy, not a general FPGA benchmark or guaranteed improvement for another design.
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What a defensible selection looks like
A defensible choice is supported by evidence tied to the mission profile, the exact candidate and implemented design, tested fault and recovery behavior, and the project’s applicable assurance baseline. If any of those links is missing, record the gap and resolve it with candidate-specific documentation, analysis or testing, and the responsible assurance authority before treating the FPGA as suitable for flight.
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