DUV’s main limit is its longer wavelength: the highest-resolution deep ultraviolet systems use 193 nm light, while extreme ultraviolet (EUV) uses 13.5 nm. Immersion optics and multiple patterning let DUV print very small structures, but they cannot erase that optical gap without adding process complexity. EUV images smaller features, yet its light, optics, resist and pattern-transfer steps bring their own constraints. That is why DUV remains useful for many chip layers rather than disappearing altogether.
What sets the optical resolution limit?
A useful way to understand lithography resolution is the Rayleigh relationship: critical dimension (CD) is approximately k1 × wavelength / numerical aperture (NA). Wavelength and NA describe the optical system; k1 represents process and patterning techniques used to push resolution. The equation is a guide, not a direct prediction of a chip’s final feature size: resist, mask, etch and other process effects matter too. ASML identifies k1 = 0.25 as the physical limit for lithography.
DUV starts with a longer wavelength
DUV covers more than one wavelength, including 248 nm KrF. For the highest-resolution DUV exposure, however, the relevant wavelength is 193 nm ArF. EUV’s 13.5 nm wavelength is much shorter, giving it a decisive optical advantage. As ASML explains, EUV systems can print smaller features than DUV even though their NA is lower, because wavelength is also part of the resolution relationship.
Why DUV cannot simply use a much bigger lens
The strongest optical lever available to DUV is immersion: water between the final lens and wafer lets the system reach an NA of 1.35, according to ASML’s explanation of lithography optics. That is a high NA, but it does not shorten the 193 nm wavelength. Optical designs also face practical limits, and pushing resolution through process tricks has diminishing room as k1 approaches its physical limit. Raising NA alone cannot make DUV match EUV’s wavelength advantage.
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How DUV extends its range—and what it costs in process steps
When a desired pattern is too fine for one DUV exposure, manufacturers can use multipatterning: split the pattern across multiple exposures and masks, then combine the results through processing. This lets DUV produce structures smaller than a single exposure could resolve, but it adds steps and alignment work. ASML describes EUV single patterning as reducing masks and process steps for some advanced layers; that does not mean every EUV layer is single-patterned or every DUV layer needs multiple exposures. The relevant comparison is the complete patterning flow, not wavelength alone. See ASML’s 2025 annual report for its discussion of patterning approaches.
Why EUV’s shorter wavelength requires a different machine
EUV’s optical advantage comes with a fundamental materials problem: ordinary materials, including air, absorb EUV light. EUV scanners therefore use multilayer reflective mirrors rather than the refractive lenses used in DUV, and the optical path operates in vacuum. The light has to be generated and guided within that specialized architecture, so EUV is not simply a DUV scanner fitted with a shorter-wavelength lamp. ASML describes the contrast between DUV lenses and EUV mirrors and lists system specifications on its EUV lithography systems page.
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How the DUV and EUV system figures compare
| System or approach | Wavelength | Numerical aperture | Stated resolution | How to read the figure |
|---|---|---|---|---|
| Highest-resolution DUV immersion | 193 nm ArF | 1.35 | Not stated by ASML on the cited pages | ASML technical-page figures; DUV also includes other wavelengths, such as 248 nm KrF. |
| ASML NXE EUV | 13.5 nm | 0.33 | 13 nm | ASML vendor system specifications, not a universal minimum feature size. |
| ASML EXE High-NA EUV | 13.5 nm | 0.55 | 8 nm | ASML vendor system specifications, not a guarantee for every pattern or production process. |
These values show why NA cannot be compared in isolation: DUV immersion’s 1.35 NA is higher than EUV’s 0.33 or 0.55, yet EUV’s much shorter wavelength supports smaller imaging. The quoted NXE and EXE resolution figures are system specifications, not statements that every chip feature—or a chip’s process-node label—has that size.
What still limits EUV patterning?
Optical resolution is not the same as a manufacturable pattern with acceptable defect levels and yield. Resist chemistry and stochastic variation, line-edge roughness, masks, underlayers, etch transfer, exposure dose and tool uptime all influence what can be made reliably. A finely imaged resist pattern must still survive downstream processing and become the intended structure in the wafer. The broader pattern-transfer context is described in imec’s lithography overview.
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Demonstrations establish capability, not universal production readiness
In an August 7, 2024 demonstration, imec reported single-exposure printing of 9.5 nm random logic structures at 19 nm pitch using High-NA EUV. The result demonstrates a specific optimized process; it does not by itself establish universal yield or cost for arbitrary designs. In a later article summarizing a 2024 result, imec also reported 16 nm-pitch line/space single-print images on 0.55 NA EUV. These are different pattern types and should not be treated as interchangeable minimum-feature claims. See the 2024 imec demonstration and imec’s High-NA overview.
What High-NA EUV gains—and gives up
Moving from 0.33 NA to 0.55 NA raises NA by 67%, according to imec, improving the system’s ability to resolve finer patterns. But higher NA narrows the process window in another dimension: imec estimates that 0.55 NA EUV has two to three times smaller depth of focus than 0.33 NA EUV. That leaves less tolerance for focus variation through the wafer and makes process integration more demanding.
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High-NA systems also require work beyond the scanner’s nominal resolution. Imec identifies thinner resists, mask and metrology development, defectivity control, and field-size implications associated with anamorphic optics as part of the integration challenge. Those are practical limits on turning a finer optical image into a robust manufacturing process, not evidence that the resolution gain is illusory. See imec’s discussion of entering the High-NA EUV era.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.Does EUV replace DUV completely?
No. EUV is valuable where its finer imaging can simplify or enable critical layers, but a chip is built from many patterned layers with different requirements. DUV’s mature optical approach remains useful for layers that do not need EUV’s resolution, while multipatterning can extend DUV on demanding patterns at the cost of additional processing. The choice is layer- and process-specific; neither “EUV replaces all DUV” nor “every advanced layer uses EUV” follows from the optical comparison.
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Keep resolution, pitch and process node distinct
A scanner’s stated resolution, a demonstrated line width, a pattern’s pitch and a chip’s process-node name are different quantities. Pitch is the repeat spacing in a pattern, while node names are not literal measurements of every feature on a chip. A lab demonstration at a particular pitch shows that a defined pattern was printed under reported conditions; it should not be read as a universal production guarantee or translated directly into a node label. For more on how lithography fits into chip fabrication, see imec’s overview.
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