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The Straggler Problem: Why One Slow GPU Can Stall an LLM Training Run

In synchronous LLM training, every step runs at the pace of its slowest worker. Here is how stragglers form, what causes them besides bad hardware, and how to diagnose them.

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In synchronous distributed training, every worker must reach the same synchronization point before the next step can begin, so each step runs at the pace of its slowest participant. One lagging GPU can leave the rest of the cluster idle. The lagging device is not always the cause, though: the delay may come from uneven work assignment, long sequences, data loading, garbage-collector pauses, or communication. Diagnosis starts by identifying the operation the group was waiting on.

Why does one slow GPU stall the whole run?

In data parallelism, each worker processes its share of a batch and then joins a gradient synchronization before the next step. Workers that finish early hold their results and wait, so the step time is set by the last arrival. Other parallelism layouts follow the same logic, but the waiting point moves.

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Parallelism style Where the group waits What a late participant holds up
Data parallelism (PyTorch DDP) Gradient synchronization at each step Every worker that has already finished its backward pass
ZeRO and FSDP Reduce-scatter and all-gather collectives over sharded state Each collective that needs the slow participant’s shard before it can complete
Pipeline parallelism Handoffs between model stages and microbatches Downstream stages, which sit idle in pipeline bubbles while waiting for input
Tensor and context parallelism Exchange of partial results within a device group All devices in that group, because progress is paced by the slowest device at each exchange

Because these dependencies chain together, a delayed pipeline microbatch can affect later work across the whole training job, not only on the device where the delay began. ZeRO and FSDP change which state is sharded and which collectives run, but they still create coordination points that a slow participant can hold up.

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Is a straggler always a bad GPU?

The visible symptom is one device whose step looks long. The useful question is which operation, or which input to that operation, was late. The causes below are documented in large-model training work and in PyTorch’s guidance on DDP.

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Uneven pipeline-stage work

Pipeline parallelism divides a model’s layers into stages. If layers or operations are distributed unevenly, the heaviest stage becomes the bottleneck and the lighter stages wait for its output. In the OSDI ’25 study of ByteDance’s LLM training cluster, work imbalance between pipeline stages was one of the causes that accounted for many of the observed stragglers.

Sequence-length imbalance

Microbatches containing longer sequences require more computation. If one rank or stage receives them repeatedly, it finishes late even when its hardware is healthy. The same study identifies sequence-length imbalance between microbatches as a cause of stragglers in its trace.

Garbage-collector pauses

Pauses from garbage collection in the training process can hold a worker back at irregular intervals. The OSDI ’25 study identified these pauses as a cause of stragglers in its training cluster. They rarely show up as a hardware fault, so they are easy to miss if only GPU utilization is checked.

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Data input and preprocessing

PyTorch’s engineering write-up on DDP stragglers lists three input-side sources: outlier-sized examples, unstable network I/O during data transfer, and on-the-fly transformations whose cost varies from example to example. Each can create workload imbalance before the synchronization point, so the worker looks slow only because its input arrived late.

Communication delays

The NSDI ’26 PIPEMORPH work cites network congestion, RNIC or switch defects, and topology asymmetry as communication-straggler conditions in pipeline training. These appear in collective timings rather than compute time, which is why they are easy to mistake for a slow GPU.

Transient device interruption

Some newer approaches address the case where device availability changes during a run and the parallel layout has to adapt. This is related to a straggler but is not the same thing as a persistently slow worker, because the device is unavailable rather than merely late. The approaches are covered under the mitigation options below.

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What the ByteDance cluster data shows

The OSDI ’25 paper Understanding Stragglers in Large Model Training Using What-if Analysis analyzed a five-month trace from ByteDance’s LLM training cluster, covering January through May 2024. Its what-if analysis accounts for operation dependencies and simulates the effect of removing straggler time, rather than labeling every slow step as a hardware fault. The reported results include:

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  • 42.5% of jobs in the trace were at least 10% slower due to stragglers.
  • For jobs at the tail of the distribution, stragglers could waste up to 45% of allocated resources.
  • Computation-operation slowdowns were more common than communication-operation slowdowns.
  • The study found no positive correlation between job size and straggler-related slowdown.

Slowdowns often persisted across many steps of a straggling job. The authors write: “Most steps incur similar slowdowns within a straggling job, suggesting that they are often not caused by transient environmental issues but are rather caused by persistent problems.” That is their reading of their own trace, and it is most useful as a prompt to look for a repeating cause. These figures describe one cluster over one five-month window; they are not a universal straggler rate for LLM training.

How do I find a straggler in PyTorch DDP?

Start from per-rank traces rather than a hardware label. PyTorch’s DDP example makes a practical point: the process reporting the largest synchronization cost is not necessarily the straggler. It may be one of the faster processes, having reached the collective early and waited for the others.

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  1. Collect per-rank traces covering the same training steps for every process, and compare each step across ranks.
  2. For each rank, measure how long it spends on work before the synchronization point begins. The rank that arrives last usually has the longest pre-collective work.
  3. Compare the wait time inside the all-reduce across ranks. A rank with a long wait has usually finished its own work early. The rank with the shortest wait is often the late arrival, because the others have been waiting on it.
  4. For the suspected rank, inspect data-loading durations, sequence lengths in its microbatches, and pipeline-stage timing before the collective.
  5. Look for recurring pauses, such as garbage-collector activity, in that process’s timeline.
  6. Check whether the same slowdown repeats across steps. Repeating delays point to a persistent cause; isolated ones point to a transient event.

The OSDI ’25 study reports that parts of its analysis pipeline were incorporated into SMon, a tool deployed in the ByteDance cluster and used by its on-call team to detect and address stragglers. That is a documented example of operational use inside one organization. It does not establish SMon as a generally available product.

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Mitigation options and how they differ

No single change fixes every straggler. The table compares the approaches in the sources reviewed, with each source’s stated status.

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Approach Cause it targets Status in the cited sources
Balancing pipeline stages, and inspecting sequence length, data loading, and pauses Compute imbalance and input-side delays Causes documented in the ByteDance trace and in PyTorch’s DDP discussion; no single adjustment covers every cause
Hierarchical SGD Random slow processes in synchronous updates PyTorch describes an implementation and illustrative experiments
Asynchronous SGD Waiting at synchronous boundaries A 2018 PMLR analysis studies the runtime and error tradeoff; IBM describes grouped synchronization as an intermediate balance
Resilient pipeline scheduling with communication offload Communication delays in pipeline training NSDI ’26 PIPEMORPH reports a 1.2–3.5× iteration-time improvement in its tested settings
Adapting tensor parallelism during interruptions Device unavailability during a run NVIDIA’s 2026 technical blog describes the NTP approach and labels it experimental and forward-looking

Compare candidate approaches on six axes: the cause addressed (compute imbalance, data, communication, or device unavailability), synchronization semantics, convergence or accuracy implications, implementation maturity, resource overhead, and the measurement setting behind the reported results. Asynchronous updates, hierarchical SGD, pipeline rescheduling, and elastic tensor parallelism address different problems, so they are not interchangeable.

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Hierarchical SGD

Hierarchical SGD synchronizes more often within smaller groups and less often across the full set of workers. A random slow process therefore has its direct effect limited to its own group rather than the whole job. The cost is a changed synchronization cadence: warmup and hierarchy parameters affect convergence and how closely results match the fully synchronous baseline.

Asynchronous updates and gradient staleness

Asynchronous methods let workers update without waiting at every synchronous boundary, which can alleviate stragglers. The cost is gradient staleness, where gradients are computed against parameters that have since changed. The 2018 AISTATS paper by Sanghamitra Dutta, Gauri Joshi, Soumyadip Ghosh, Parijat Dube and Priya Nagpurkar, published in PMLR, puts the tradeoff this way: “Asynchronous methods can alleviate stragglers, but cause gradient staleness that can adversely affect convergence.”

Pipeline rescheduling and communication offload

PIPEMORPH, published at NSDI ’26, adapts pipeline scheduling around communication delays and moves communication operations to host memory and CPU-side RDMA. The aim is to reduce GPU head-of-line blocking, where a stalled communication operation holds up the GPU work queued behind it. The 1.2–3.5× iteration-time improvement applies to the settings the authors tested, and the approach is a specialized systems technique rather than a setting change a team can make on its own.

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Adapting tensor parallelism during interruptions

NVIDIA’s 2026 technical blog describes NTP, an approach that reconfigures a replica to run on the GPUs still available and overlaps resharding with computation and synchronization. NVIDIA labels it experimental and forward-looking, and its outcome depends on hardware, power, and software assumptions. It is best read as a signal of where the field is heading rather than as an established production option.

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