Jailhouse already supports ARMv8/ARM64; bringing it up on a particular board is usually a matter of meeting its boot and memory prerequisites, then adapting the board’s system and cell configurations. Jailhouse is loaded and configured from Linux, after which it statically assigns hardware resources to cells rather than acting as a general-purpose VM scheduler. The target board and whether you mean an upstream port or board enablement are not specified, so the steps below describe a practical board-bring-up path rather than a board-specific recipe.
Does Jailhouse support ARMv8?
Yes. The Jailhouse project README documents ARMv8/ARM64 support, lists example ARM64 boards, and describes an ARM64 QEMU demonstration. In most cases, “porting Jailhouse to ARMv8” is therefore better understood as enabling a specific board: checking its boot chain and hardware resources, then preparing system and cell configurations for that platform.
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Jailhouse is a partitioning hypervisor based on Linux. Linux loads and configures it; Jailhouse then assigns CPUs, memory, interrupts, and devices to cells. Its emphasis is static partitioning, not dynamically scheduling guests or overcommitting resources. The design paper “Look Mum, no VM Exits! (Almost)” describes how direct hardware assignment and deferred initialization leave complex hardware handling and bootstrapping to the general-purpose OS.
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The project README describes several requirements for ARM bring-up. Confirm them against the documentation for the exact board, firmware, and Jailhouse revision you intend to use; the README is a mutable project page, and its kernel baselines are historical minimums rather than universal current recommendations.
#1 Best Overall
- High-performance foundation line, ARM Cortex-M4 core with DSP and FPU, 512 Kbytes Flash, 180 MHz CPU, ART Accelerator, Dual QSPI
- On-board ST-LINK/V2-1 debugger/programmer with SWD connector
- Can be powered from USB
- Three LEDs, Two Push-buttons
- Support of wide choice of Integrated Development Environments (IDEs) including IAR, ARM Keil, GCC-based IDEs
- Boot into HYP mode: the README says ARM Linux must be started in HYP mode.
- CPU offlining through PSCI: the platform’s PSCI implementation must support taking CPUs offline.
- At least two logical CPUs: the documented ARM requirements call for two or more.
- Contiguous reserved memory: reserve contiguous RAM for the hypervisor and additional cells. The README gives limiting Linux-visible memory or reserving memory in the device tree as examples.
- Kernel baseline: the README states ARM 3.19+ and ARM64 4.7+. These are the project’s stated baselines in that documentation, not a recommendation to select an old kernel; check the current project revision and target-platform support.
Plan the board-specific configuration
ARM system configuration is not generated automatically in the project workflow described by the README. Expect to adapt a reference configuration using the board’s datasheets, device tree, and system information. Before editing, record the precise board and SoC revision, Jailhouse revision, Linux version, boot firmware, available CPUs and memory, and the intended inmate.
System configuration
The system configuration describes the platform resources and the root-cell setup needed to enable Jailhouse. Match its memory regions, interrupt-controller details, CPUs, and assigned devices to the actual board and reserved-memory arrangement. A configuration copied from a similar board is a starting point, not proof that its addresses or assignments apply to yours.
Rank #2
- Ultra-low-power with FPU ARM Cortex-M4 MCU 80 MHz with 1 Mbyte Flash, LCD, USB OTG, DFSDM
- On-board ST-LINK/V2-1 debugger/programmer with SWD connector
- Can be powered from USB
- Three LEDs, Two Push-buttons
- Support of wide choice of Integrated Development Environments (IDEs) including IAR, ARM Keil, GCC-based IDEs
Cell configuration and device tree
For ARM and ARM64 Linux inmates, the project guide says a specially modified kernel is not required, but the inmate needs a device tree. Start with the relevant project configuration templates where an applicable target exists, then verify that the tree and cell configuration describe the resources actually assigned to that cell.
Cell configuration is hardware-specific. In NXP’s i.MX 8M Mini/Nano Jailhouse guide, the example assigns CPU cores, interrupt lines, memory regions, and a virtual PCI communication device. It uses separate root-cell and Little Kernel cell configurations. Those names and assignments are specific to that documented setup, not a generic ARM64 template.
Rank #3
Bring up a cell in stages
Once the prerequisites and configurations are in place, the general project flow is to install the required kernel module, firmware, and tools; enable Jailhouse with the system configuration; create and load a cell with its payload and device tree; and start it. Exact commands and artifact paths depend on the target and build.
- Build and install the matching components. Use the Jailhouse revision and kernel appropriate for the board, and install its module, firmware, and userspace tools.
- Load the module and enable the root-cell configuration. The NXP i.MX 8M Mini/Nano example uses
modprobe jailhouse, followed byjailhouse enable <rootcell>. - Create the inmate cell. In the NXP example,
jailhouse cell create <lkcell>creates the Little Kernel cell from its configuration. - Load the payload and device tree, then start the cell. The guide’s sequence loads the DTB and
lk.binbefore starting the cell. Follow the documented target-specific addresses, filenames, and command syntax rather than treating those as portable values.
For an ARM64 Linux inmate, provide the device tree that matches the cell’s allocated hardware. For any inmate, verify the cell’s CPU, memory, interrupt, and device assignments before interpreting a boot failure as a hypervisor problem.
Rank #4
- Mainstream Mixed signals MCUs ARM Cortex-M4 core with DSP and FPU, 512 Kbytes Flash, 72 MHz CPU, MPU, CCM, 12-bit ADC 5 MSPS, PGA, comparators
- On-board ST-LINK/V2-1 debugger/programmer with SWD connector
- Can be powered from USB.
- Three LEDs, Two Push-buttons
- Support of wide choice of Integrated Development Environments (IDEs) including IAR, ARM Keil, GCC-based IDEs
Choose QEMU or a physical board for the first run
The upstream README documents both an ARM64 QEMU route and physical-board examples. QEMU can provide an initial software path; it does not establish that a physical board’s firmware, peripherals, or interrupt behavior will match the virtual machine.
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| Consideration | QEMU ARM64 | Physical ARM64 board |
|---|---|---|
| Boot and firmware assumptions | Use the virtual machine and boot setup described by the README; it does not verify the target board’s firmware behavior. | Validate the board’s boot chain, HYP-mode startup, and PSCI CPU-offlining behavior. |
| Devices and interrupts | The README’s demonstration uses an AArch64 virtual machine, Cortex-A57 CPU, and GICv3 configuration. | Match the actual interrupt controller, peripherals, and resource assignments for the specific board and revision. |
| Configuration work | Use the documented QEMU system configuration and demo cell as a software starting point. | Adapt system and cell configurations and the inmate device tree to the board’s hardware. |
| Relevance to deployment | Useful for an initial software exercise; it does not reproduce every physical-board behavior. | Tests the intended hardware, but depends on the exact platform and its supported configuration. |
The README’s QEMU demonstration enables Jailhouse and runs a GIC demo cell. For a physical-board effort, compare candidates by exact SoC and board revision, boot firmware, HYP-mode and PSCI behavior, available CPUs and memory, interrupt-controller and peripheral layout, and whether a maintained Jailhouse configuration is available. These are selection criteria, not compatibility results.
Quick Recap
Best Value
- STM32F103C8T6 ARM STM32 minimum system development module.
- ST-Link V2 support the full range of STM32 SWD interface debugging, simple interface (including power supply), 4 line speed, stable work.
- Use the current smart phones of Mirco USB interface, easy to use, USB communication and power supply can be done.
- The board lead to all the I/O resources.Download with SWD debug interface, which requires a minimum of 3 wires to complete debug a download task
Diagnose failures by layer
- Jailhouse will not enable: first recheck the board’s HYP-mode boot, PSCI CPU-offlining support, reserved contiguous memory, and the match between the selected system configuration and hardware.
- The cell cannot be created or started: inspect its CPU, memory, interrupt, and device assignments, along with the root-cell allocation. A resource already owned by the root cell cannot also be assigned to an inmate.
- A Linux inmate does not boot correctly: check that its device tree corresponds to the cell’s assigned resources and that the payload and configuration belong to the same target setup.
- A QEMU result differs from the board: treat the virtual demonstration as a software starting point, not evidence that board firmware or physical devices behave identically.
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