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Repair Windows errors before they cause bigger problemsFix Now →Scan for outdated or missing drivers - takes under a minuteDriver Scan →The HS6620D is a complete Bluetooth Low Energy system-on-chip, not merely a Bluetooth module or standalone microcontroller. The Version 3.0 document describes an ARM Cortex-M3 running up to 48 MHz, integrated 2.4 GHz radio and BLE baseband, memory, power-management and charging functions, and a broad peripheral set. The accessible copy is a third-party mirror of a document titled “HS6620D Bluetooth Low Energy Application,” dated May 15, 2019, so use it as an archived technical reference rather than proof of current vendor support or availability: HS6620D Data Sheet V3.0.
What the HS6620D PDF is
The PDF is substantially more detailed than a short product leaflet. Its sections cover the system architecture, electrical and RF characteristics, pin definitions, clocks, power management, GPIO alternate functions, UART, SPI, I²C, I²S, ADC, DMA, timers, RTC, watchdog, keyboard control, Bluetooth software diagrams, package information and an application circuit.
The filename “HS6620D_data_sheet_V3.0” identifies the mirror copy; inside, the title is “HS6620D Bluetooth Low Energy Application.” Version 3.0 and the 2019 date should not be treated as evidence of a current revision. The available copy is hosted by PDFCoffee, not a clearly verified current HunterSun or OnMicro download portal.
HS6620D specifications at a glance
| Category | Documented value | Qualification |
|---|---|---|
| Device | BLE and proprietary 2.4 GHz SoC | Version 3.0 document claim |
| Bluetooth | Bluetooth 4.2 Low Energy | Does not establish Bluetooth 5.x support |
| CPU | ARM Cortex-M3, up to 48 MHz | Datasheet figure |
| Memory | 128 KB SRAM; 256 KB ROM; 1 MB SFLASH | Product manuals may describe external storage differently |
| Supply | 2.7–3.6 V | Feature-list value; verify electrical limits for a design |
| Deep sleep | 5 µA | Chip operating mode, not finished-product standby |
| BLE sensitivity | −93 dBm | Datasheet RF figure |
| Transmit power | −20 to +2 dBm | Datasheet range |
| Peak current | 10 mA receive; 10 mA transmit at 0 dBm | Feature-summary figures |
| Package | QFN48, 6 mm × 6 mm | Requires RF-aware PCB assembly |
| Clocks | 24 MHz main clock; 32.768 kHz low-frequency options | Crystal and RC choices are described |
| GPIO and ADC | Up to 31 GPIO; eight single-ended or differential 12-bit ADC inputs | Pin multiplexing limits simultaneous use |
Architecture: why it is a system-on-chip
The block diagram combines an RF transceiver, BLE baseband and link controller, proprietary 2.4 GHz controller, ARM Cortex-M3 processor, memory, AHB/APB interconnect, DMA, power management and digital/analog peripherals. Hardware AES is also listed. That integration lets a product run application firmware and wireless protocol functions on one chip.
#1 Best Overall
- Dual-Core Performance Up to 240 MHz: Run sensor processing, wireless communication, automation logic and connected-device tasks on a 32-bit dual-core ESP32 platform designed for responsive embedded and IoT projects
- Built-in Wi-Fi and Bluetooth 4.2: Connect to 2.4 GHz Wi-Fi networks or use Bluetooth Classic and BLE for wireless sensors, smart devices, remote controls, home automation and other connected projects
- Flexible Power-Saving Modes: ESP32 power-management features support dynamic clock scaling and low-power operating modes, helping developers reduce energy use in compatible sensing, monitoring and connected-device applications, suitable for battery-powered Internet of Things (IoT) devices.
- USB-C Programming with CP2102: Connect through USB-C for power, sketch uploads and serial monitoring, while GPIO, UART, SPI and I2C interfaces support sensors, displays, motor drivers and other modules (USB-C cable not included)
- Over-the-Air Update Support: Configure OTA functionality through a compatible ESP-32 software framework to update deployed firmware over Wi-Fi without reconnecting the board by USB for every revision
The document also claims a complete BLE controller-and-host stack, mesh support, OTA support, 6LoWPAN support and network-processor operation for an external MCU. These are capabilities described by the 2019 document; actual use depends on the supplied software, firmware and development tools.
Bluetooth and radio capabilities
- Bluetooth Low Energy 4.2 PHY and link-controller functions.
- Proprietary 2.4 GHz link-controller operation.
- Integrated RF transceiver and RSSI measurement with 1 dBm resolution.
- Reported BLE sensitivity of −93 dBm and transmit power from −20 dBm to +2 dBm.
Bluetooth 4.2 is a core-version statement, not a guarantee of every phone feature, profile, security mode or Bluetooth 5.x function. A wearable’s advertised phone compatibility reflects its firmware and application as well as the chip. Do not infer Bluetooth Classic audio support from this document.
CPU, memory and the “ROM” confusion
The processor is an ARM Cortex-M3 rated up to 48 MHz. The document lists 128 KB SRAM, 256 KB ROM and 1 MB SFLASH. Those labels must be separated from storage fitted to a particular board.
Rank #2
- 2.4GHz Dual Mode WiFi + Bluetooth Development Board
- Support LWIP protocol, Freertos;ESP32 is a safe, reliable, and scalable to a variety of applications
- SupportThree Modes: AP, STA, and AP+STA
- Ultra-Low power consumption, Compatible with Arduino IDE
- 1PCS 30Pin ESP32 Development Board 2.4GHz WiFi Dual Cores Microcontroller Integrated with Antenna RF Low Noise Amplifiers Filters
- On-chip ROM: the 256 KB nonvolatile resource listed in the chip documentation.
- SFLASH: the 1 MB flash resource named by the document; its physical implementation should be confirmed for the exact device and board.
- External SPI flash: a separate memory chip that a product designer may add.
- Product “ROM”: retail manuals often use ROM as shorthand for total nonvolatile storage.
A public reverse-engineering project identified an HS6620 A3 device, read 128 KB of RAM and accessed a 1 MB PUYA SPI flash on one smartwatch board: HS6620D Smart Watch Reverse Engineering. Those are observations from that implementation, not universal rules for every HS6620D design.
Peripherals and pin multiplexing
- Four-channel DMA.
- Two UARTs, with one shared with a 7816 interface.
- Two SPI interfaces, each usable as master or slave.
- I²C master or slave and I²S.
- Three 32-bit timers, RTC and watchdog.
- Keyboard controller supporting up to 8 × 18.
- Three-way QDEC.
- Eight single-ended or differential 12-bit general-purpose ADC inputs.
- Hardware AES encryption.
The headline counts are not simultaneously available on every board. Alternate-function routing shares pins between GPIO, serial buses, analog channels and debug. GPIO0 and GPIO1 are assigned to JTAG clock and JTAG data I/O by default. Check the alternate-function table against the intended schematic before counting usable interfaces.
Package and abbreviated pinout
The package is a 48-pin, 6 mm × 6 mm QFN. Important groups include:
Rank #3
- ESP32-C3 is equipped with a single-core 32-bit RISC-V processor, with a four-level pipeline architecture, with a main frequency of up to 160 MHz. ESP32-C3 has 400 KB of built-in SRAM and 384 KB of ROM storage space. ESP32-C3 is the industry-leading Wi-Fi+Bluetooth LE integrated solution
- ESP32 C3 Mini is positioned as a high-performance, low-power, cost-effective iot mini development board for low-power iot applications and wireless wearable applications.
- EPS32-C3 is a cost-effective and low-power dual-mode Wi-Fi and Bluetooth chip. The ESP32-C3 uses a RISC-V processor, a single-core processor with a main frequency of 150 MHz, which integrates Wi-Fi 4 and Bluetooth 5.0 wireless communication.
- ESP32-C3 is a system-level chip (SoC) MCU with very low power consumption and high integration, which integrates 2.4Ghz Wi-Fi and Bluetooth (Bluttooth) low-end dual-mode wireless communication. consumption.
- If external power supply is required, just connect the + level of the external power supply to the position of 5V, GND connects to the negative terminal. (Support 3.3 ~ 6V power supply). Remember that when connecting the external power supply, you cannot access USB, USB and external power supply can only choose one.
| Group | Examples and implications |
|---|---|
| Power and charging | VBAT, VBAT_RF, DVDD, DVSS, VDD_IO, VBUS, VBAT_CHG, VDCDC_D and VDCDC_RF |
| RF | RF_N and RF_P; RF_N is described as RF ground and RF_P as RF input/output |
| Clocks | 24 MHz and 32.768 kHz crystal/clock pins |
| Debug | GPIO0 JTAG clock and GPIO1 JTAG data I/O by default |
| Reset | RESETN; connect high if unused |
| GPIO | Functions through GPIO30 are listed, but package allocation and alternate functions create gaps and sharing |
The document indicates that VDCDC_RF should be connected to VDCDC_D on the PCB and gives converter outputs of approximately 1.5 V typical. Follow the application circuit and electrical-characteristics sections rather than designing from the feature summary alone. Fine-pitch QFN rework also requires controlled reflow, exposed-pad grounding and careful RF geometry; a visually similar replacement is not automatically electrically compatible.
Power, sleep and charging
The stated supply range is 2.7–3.6 V, and deep sleep is listed as 5 µA. The chip includes power-management and charger-related functions, with VBAT, VBUS and VBAT_CHG pins described in the pin section.
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Outbyte PC Repair FREEClear out junk files and repair common Windows errorsFree Scan →Outbyte Driver Updater FREEScan for outdated or missing drivers - takes under a minuteDriver Scan →Five microamps is a chip-level mode measurement. A finished wearable also draws current through its display, sensors, advertising radio, external flash, regulators, leakage paths and battery-protection circuitry. It therefore cannot be used by itself to predict battery life. Charging-current limits and battery-safety behavior must come from the electrical tables and application circuit, not from the feature list.
Rank #4
- ESP32 S3 SuperMini is positioned as a high-performance, low-power, cost-effective IoT mini development board for low-power IoT applications and wireless wearable applications.
- The ESP32-S3 is Powerful CPU: ESP32-S3, 32-bit single-core processor running at 160 MHz.
- The ESP32-S3 is WiFi: 802.11b/g/n protocol, 2.4GhHz, supports Station mode, SoftAP mode, SoftAP+Station mode, and mixed mode.
- ESP32-S3 is Ultra-low power consumption: deep sleep power consumption of about 43μA ,Rich board resources: 400KB, 384KB ROM 4Mflash built-in.,Ultra-small size: as small as a thumb (22.52x18mm) Classic form factor for wearables and small projects.
- Reliable security features: cryptographic hardware accelerator with support for AES-128/256, hash, RSA, HMAC, digital signature and secure boot, Rich interfaces: 1xI2C, 1xSPI, 2xUART, 11xGPIO(PWM), 4xADC
Examples in commercial wearables
Two product documents show why SoC specifications and product specifications must remain separate:
| Product document | What it reports |
|---|---|
| Canyon CNE-SB01BN | HS6620D chipset, 128 KB RAM, 1 MB ROM, Bluetooth 4.2, a 90 mAh battery and a 0.96-inch display |
| Nordväl SW102 manual | HunterSun HS6620D processor, 128 KB RAM, 32 MB ROM and “Bluetooth 4.2 or higher” wording |
The different storage claims can reflect external flash and inconsistent consumer use of “ROM”; they do not rewrite the HS6620D core memory table. Displays, heart-rate sensors, batteries, IP ratings and companion-app behavior belong to each finished product.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.Using the chip for repair or reverse engineering
The Cortex-M3 core and documented JTAG assignments make the HS6620D useful to investigate, although a board may omit headers, multiplex the pins or enable readout protection. A public project demonstrates J-Link access and firmware/RAM work.
Best Value
- 2.4GHz Dual Mode WiFi + Bluetooth Development Board
- Support LWIP protocol, Freertos
- SupportThree Modes: AP, STA, and AP+STA
- Ultra-Low power consumption, Compatible with Arduino IDE
- ESP32 is a safe, reliable, and scalable to a variety of applications
- Identify the board: photograph the package marking, wearable model and PCB revision.
- Trace debug pads: use GPIO0/GPIO1 assignments as a starting point, then verify continuity to the SoC.
- Power safely: use a current-limited supply and confirm target voltage; never apply programmer voltage blindly to VBAT or VBUS.
- Connect a debugger: the project shows a representative command,
JLinkExe -autoconnect 1 -Device CORTEX-M3 -If SWD -Speed 4000. - Confirm identity: a Cortex-M3 or SW-DP response confirms a connection, not that firmware readout is permitted.
- Separate memories: determine whether storage is internal, external SPI flash or both, and identify external flash by its JEDEC response where appropriate.
- Preserve originals: work from a backup and account for copyright, personal data and service terms before dumping or modifying firmware.
A failed debugger connection can result from power sequencing, reset wiring, inaccessible pads, protection settings or incorrect pin identification; it does not by itself prove a dead chip.
Is the HS6620D suitable for a new design?
| Use case | Assessment |
|---|---|
| Repairing an existing wearable | Reasonable when the exact chip, board and firmware are available |
| Reverse engineering | Technically interesting, with community evidence of Cortex-M3 and flash access |
| Reproducing a legacy board | Possible, but verify supply, SDK, boot process and memory resources |
| New consumer product | Evaluate currently supported BLE SoCs first |
| Drop-in replacement | Not established without complete package, pinout, RF, memory and firmware comparison |
The main advantages are integrated BLE and MCU functions, low-power intent, a useful peripheral set, hardware AES, charging support and a compact package. The risks are its older Bluetooth generation, uncertain current documentation and software support, limited modern ecosystem, difficult QFN/RF implementation, inconsistent memory terminology and unclear present-day supply.
For a new product, compare candidate SoCs for package and pinout, voltage, flash and RAM, radio performance, active and sleep current, peripheral routing, OTA and security features, SDK quality, certification support, availability and lifecycle. Similar HS6620-series markings do not establish compatibility.
Verdict
HS6620D Data Sheet V3.0 describes a real, capable 2019-era BLE SoC: an ARM Cortex-M3 wireless controller with integrated radio, memory, power management and peripherals. It is valuable as an archival reference for identifying wearables, repairing legacy boards and planning reverse-engineering work. It is not evidence of current production support, Bluetooth 5.x capability or a readily available drop-in replacement. For a fresh commercial design, confirm vendor support and supply—or start by evaluating a modern BLE platform.
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