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How to Tech an LLM on CUDA or ROCm: A Practical Optimization Workflow

Profile representative LLM workloads, optimize the measured bottleneck, and compare CUDA with ROCm only under matching models, precision, and test conditions.
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To optimize an LLM workload on CUDA or ROCm, profile a representative run, identify its limiting phase or resource, change one thing at a time, then rerun the same workload and check both speed and correctness. The most useful change might be a kernel or memory improvement—or a serving choice such as batching or KV-cache management. There is no universal CUDA-versus-ROCm winner: results depend on the GPU, software stack, model, precision, and workload.

Define what you need the LLM to do

Start with the workload and success measure, not with a kernel you hope to optimize. A training or fine-tuning run, a single interactive request, and a high-concurrency inference service can stress different parts of the system.

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  • Workload: training, fine-tuning, or inference; for inference, single-request or serving.
  • Goal: reduce time to first token, improve decode throughput, increase requests or tokens served, or meet a memory limit. Choose the metric that reflects the actual requirement.
  • Model and inputs: record the checkpoint, precision, prompt and output lengths, and any context-length limits used.
  • Concurrency: record batch size and, for a service, the number of concurrent requests and how requests are scheduled.
  • Environment: record GPU model and memory capacity, framework and runtime versions, relevant kernel or inference-engine versions, and configuration.

These details determine whether two measurements can be compared. A result from a different model, precision, prompt length, or batching policy is not a clean CUDA-versus-ROCm comparison.

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Profile a representative run before changing code

Use inputs and traffic that resemble the workload you intend to improve. NVIDIA’s CUDA C++ Best Practices Guide 13.0 advises profiling application hotspots with realistic workloads: a synthetic test can emphasize functions that are not important in real use. The guide summarizes the priority directly: “High Priority: To maximize developer productivity, profile the application to determine hotspots and bottlenecks.”

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On either stack, investigate where time and memory go before choosing an optimization. Separate CPU-side overhead, GPU kernel time, host-to-device and device-to-host transfers, and memory pressure. For AMD, the HIP 7.15.0 performance guidelines point to ROCm profiling tools including rocprofv3, ROCm Compute Profiler, and ROCm Systems Profiler; check the current ROCm documentation for tool availability, usage, and version-specific instructions.

Record a baseline for the exact run, including latency or throughput, peak and steady-state GPU memory use where available, and correctness or output-quality checks. Without a stable baseline, it is easy to mistake workload variation for an improvement.

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Find the phase and resource that limit performance

Prefill and decode have different demands

Inference is not one uniform GPU operation. In its November 17, 2023 article, NVIDIA’s overview of inference optimization describes prefill as processing the known prompt tokens in parallel and producing intermediate key/value states. Decode then generates output tokens autoregressively. In the workload discussed in that article, decode can be memory-bound: moving model weights and KV-cache data may matter more than adding arithmetic throughput.

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That distinction changes what to measure. Prompt processing and output generation can have different latency profiles; a fast prefill does not by itself establish that token generation is fast. Measure the phase that aligns with your service goal, such as time to first token or sustained decode throughput.

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Do not assume matrix multiplication is the bottleneck

A profile may point to compute throughput, memory bandwidth, data movement, CPU overhead, insufficient parallel work, or memory capacity. NVIDIA’s CUDA guide organizes optimization around parallel execution, memory use and bandwidth, and instruction throughput. AMD’s HIP guidance likewise emphasizes reducing transfers, coalescing memory accesses, maintaining enough resident work, balancing resource use, and reusing data on-chip. These are principles to test against a profile, not a promise that any one change will speed up every workload.

Apply the smallest optimization that addresses the bottleneck

  1. If transfers dominate: remove unnecessary host-device copies, keep reusable data on the GPU when practical, and combine small transfers where the implementation permits. Measure again; retaining data on-device can also increase memory use.
  2. If memory access is inefficient: inspect whether threads access global memory in a coalesced pattern and whether data can be reused on-chip. HIP’s guidelines identify coalescing and shared memory/LDS reuse as relevant techniques; CUDA’s guide also recommends coalesced global-memory access.
  3. If there is too little parallel work: look for ways to expose sufficient independent work, while checking resource use and occupancy. More parallelism is useful only when it addresses the measured constraint.
  4. If math throughput is limiting: consider supported matrix instructions and precision choices, then validate numerical behavior and model quality. NVIDIA’s deep-learning performance guidance notes that Tensor Core efficiency depends on data type and dimension alignment; listed alignment conditions differ among TF32, FP16, and INT8. Do not treat one alignment rule as universal across GPU generations or libraries.
  5. If serving behavior is limiting: investigate batching, KV-cache management, attention kernels, and quantization as runtime-level choices. These can change utilization, memory footprint, throughput, latency, and output quality, so validate the selected model and configuration rather than assuming a feature is beneficial.

For batching and related inference techniques, the 2023 NVIDIA article explains that batching can improve utilization, while static batches may wait on requests with longer completions and larger batches are constrained by memory. It also discusses KV caching, grouped-query and multi-query attention, FlashAttention, PagedAttention, quantization, and in-flight batching. Treat those as techniques to evaluate in the runtime you actually use; current support and performance depend on its release and configuration.

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Keep CUDA and ROCm implementation details separate

The optimization workflow is shared, but CUDA and ROCm/HIP are different software stacks with distinct APIs, hardware support, libraries, and kernel availability. HIP guidance applies to the AMD ROCm environment and should be checked against the chosen GPU and ROCm release. Likewise, NVIDIA’s versioned CUDA guide is not a compatibility guarantee for every CUDA library or GPU.

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Framework and engine support can change between releases. NVIDIA’s TensorRT-LLM documentation links to release notes and a support matrix; consult those current materials before relying on a particular combination. AMD’s versioned ROCm 6.2.0 guide to LLM fine-tuning and inference optimization is an older release-specific reference, not evidence of today’s GPU or framework support matrix. Verify the current ROCm documentation for your exact environment.

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Compare platforms with the same workload

A useful comparison holds the model and test conditions constant, then reports enough detail for someone else to understand what was measured. Avoid treating results from different workloads as a platform head-to-head.

Record Why it matters
GPU model and memory capacity Hardware capability and memory limits affect which model, batch, and runtime configuration can run.
Framework, runtime, kernels, and versions CUDA and ROCm implementations may use different libraries or kernels; version details make the configuration interpretable.
Model checkpoint and precision Different weights or numerical formats can change quality, memory use, and speed.
Prompt length, generated-token count, and workload phase Prefill and decode can behave differently; input and output lengths must match for a meaningful comparison.
Batch size and concurrency These affect utilization, queueing, and memory requirements.
Prefill latency and decode throughput Separate measures help reveal whether prompt processing or token generation is driving the result.
Peak and steady-state memory use Memory pressure can limit the feasible batch, context, or cache configuration.
Measurement method and conditions State how the metric was collected and whether the run was warmed up or steady-state; use the same method on both stacks.

No directly comparable current CUDA-versus-ROCm LLM benchmark figure is established by the cited material. A trustworthy platform comparison therefore needs measurements from the same model, precision, input and output lengths, batching or concurrency, and measurement method, along with GPU and software versions.

Rerun, validate, and keep only measured improvements

After a change, rerun the same representative workload under the same conditions. Report absolute results as well as the relative change, and retain correctness or quality checks alongside performance numbers. If the workload or configuration changes, treat it as a new baseline rather than attributing the difference to the code change.

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When a result is unexpected, revisit the profile: the change may have exposed a different bottleneck, shifted work between prefill and decode, or increased memory pressure. Optimize that newly measured limit rather than stacking unrelated changes.

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