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Choose a quantum error-correcting code by matching it to your hardware, measured noise, workload, decoder, and resource limits—not by selecting the family with the most attractive distance or qubit count. Compare candidate codes as complete implementations, including their logical reliability, connectivity and routing demands, decoding speed, and support for the operations your experiment needs.
Start with the research objective, not the code family
A code that is suitable for storing quantum information may not be the right choice for a project that must perform a particular set of logical gates, prepare states, or communicate quantum information. Define what the experiment is meant to demonstrate before narrowing the code shortlist.
- Memory: Is the central goal to preserve encoded information over repeated error-correction cycles?
- Logical operations: Which gates, measurements, or state preparations must the encoded system support?
- Communication: Does the project require moving or exchanging encoded information between locations or devices?
- Broader fault-tolerant workload: What circuit or algorithm will run, and what is its logical-qubit and operation profile?
Write down the required logical operations and success criteria in terms that can be tested. “Better error correction” is not a sufficiently specific objective: candidates need to be compared against the same task and performance target.
What do a code’s parameters tell you?
Quantum codes are often summarized with parameters such as [[n,k,d]]: n is the number of physical qubits, k the number of encoded logical qubits, and d the code distance. The QEC Challenge FAQ explains distance in terms of the smallest undetectable error. These values are useful for describing and comparing codes, but they do not by themselves predict the cost or performance of a complete implementation.
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For a research decision, treat the notation as a starting point. It does not tell you whether the checks can be measured efficiently on your device, how much routing they require, whether the decoder can keep up with measurements, or how the code performs under the device’s actual noise processes. Nor does a parameter triple alone determine whether the code supports the logical operations required by your workload.
Shortlist codes against the hardware architecture
First document the target device: its qubit connectivity, native operations, measurement and reset capabilities, relevant error processes, and available classical processing. Then identify code families that can plausibly be realized on that architecture.
Rank #2
| Candidate family | Why it may merit evaluation | What to investigate on the target hardware |
|---|---|---|
| Surface code | A useful baseline for architectures with planar connectivity. | Whether its checks, operations, and layout fit the device and workload; measure performance under the same noise model used for other candidates. |
| Quantum LDPC (qLDPC) codes | They are an alternative code family, with sparse checks and potential redundancy advantages described in the PRX Quantum perspective and QEC Challenge FAQ. | Whether the required connectivity, check measurements, placement, and routing are practical. Sparse checks or a theoretical redundancy advantage do not remove the cost of realizing the architecture. |
This is a shortlist, not a universal ranking. A 2026 study of multilayer superconducting hardware presents hardware-aware placement and routing for quantum LDPC codes, underscoring that physical layout is part of the implementation cost. A code’s abstract properties and its realizable layout must be assessed together.
Evaluate the code and decoder under realistic noise
Use a documented noise model that reflects the target device and the processes relevant to the experiment. Real hardware can involve leakage, crosstalk, and errors that are difficult to model; a comparison that ignores important processes may not predict how candidates behave on the device.
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Keep the evidence level explicit. A theoretical distance argument or threshold analysis is not the same result as an end-to-end demonstration on the intended hardware. Report which kind of evidence supports each conclusion, and state the assumptions behind simulations or projections.
Compare candidates on the same workload and criteria
When more than one candidate remains plausible, evaluate them under a shared noise model and a full circuit representative of the project. The cross-layer criteria below help prevent a favorable number in one dimension from hiding a practical bottleneck in another.
| Criterion | Question to answer |
|---|---|
| Logical reliability | How does each candidate’s logical error behavior compare under the same noise assumptions and workload? |
| Physical and logical qubits | How many physical qubits are required for the needed number and rate of logical qubits in the proposed implementation? |
| Connectivity and layout | What check weights, placement constraints, and routing or data-movement costs does the implementation require? |
| Timing and throughput | How long does a syndrome cycle take, and can the decoder process its results at the required rate? |
| Logical operations | Does the code support the operations and state preparations the workload requires, and what implementation costs do they add? |
| Classical and control overhead | What decoding and control resources are needed, and can they be integrated with the physical system? |
These factors are coupled. For example, a code’s logical behavior cannot be separated from its noise assumptions, while its theoretical structure does not settle whether connectivity, routing, measurement timing, and decoding can work together at system scale. The 2026 QEC survey frames code evaluation around physical realizability, real-time execution, and system-scale utility, including reliability, timing and throughput, quantum and classical overhead, connectivity, data movement, physical integration, and power.
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Use this decision workflow
- Define the objective. Specify whether the project is a memory experiment, a logical-gate demonstration, a communication task, or a broader fault-tolerant workload. List required logical operations and measurable success criteria.
- Characterize the platform. Record connectivity, native operations, measurement and reset capabilities, relevant noise processes, and available classical processing. Include known uncertainty in the characterization rather than treating the model as exact.
- Build an architecture-compatible shortlist. Use the device layout to identify plausible candidates. A surface-code baseline is relevant in planar-connectivity settings; investigate qLDPC options when their encoding and overhead properties justify exploring more demanding connectivity or routing.
- Choose a representative workload and decoder. Evaluate the code and a compatible decoder on a full circuit under the documented noise model. Include the operations and state preparation that matter to the project.
- Measure the full cost. Track logical performance, physical-qubit use, logical-qubit yield or rate, routing and operation cost, syndrome-cycle timing, decoder throughput, and classical resources. Include control and integration constraints where they affect the system.
- State the limits of the result. Separate theoretical analysis, simulation, and hardware demonstration. Record the assumptions, noise model, workload, and resource budget behind any comparison so another researcher can interpret or reproduce it.
Where qLDPC research software fits
The qLDPC repository describes tools for constructing and analyzing quantum LDPC and broader stabilizer or subsystem codes. Its listed capabilities include logical-operator construction, distance calculation or upper bounds, code-capacity logical-error calculations, state-preparation circuits, post-selection analysis, custom Pauli noise models, and decoder selection. It also lists integrations with ldpc, stim, sinter, QDistRnd, and MAGMA.
These repository-described capabilities can support code exploration and analysis; they do not establish that a particular setup reproduces an experiment or models a specific device accurately. Check the current versions and documentation, and verify compatibility with the experiment’s noise assumptions, workload, and software environment before relying on a result.
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