In Espressif’s own person-detection example, the change that matters most on ESP32-S3 is enabling ESP-NN kernels for TensorFlow Lite Micro (TFLite Micro). With them on, invoke() drops from 2300 ms to 54 ms at 240 MHz. That is one vendor example for one model and one configuration, so it shows where to look, not what your model will do. This guide follows the order that produces trustworthy results: set a target, build a reproducible baseline, enable the optimized kernels, and then decide on quantization and ESP-IDF settings by measuring each change on your own board.
What the fast path consists of
Three pieces are involved, and each has a different job.
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- Espressif’s esp-tflite-micro repository supplies the ESP-IDF component and examples for running TFLite Micro on Espressif chips. Its summary lists the ESP-IDF branches it supports, so confirm that your ESP-IDF version is among them before you start.
- ESP-NN, here the v1.2.2 release in the Espressif component registry, provides optimized neural-network functions that TFLite Micro can call. For ESP32-S3 it includes assembly implementations that use the chip’s vector instructions.
- ESP-IDF provides the build system, timers, and configuration options that control how code is compiled, where it is placed in memory, and how tasks are scheduled. Its speed guide is in the ESP-IDF speed optimization documentation.
Set the target before changing anything
A target is a set of numbers with a stated scope. An illustrative example would be: “invoke() under 100 ms per frame, peak RAM under 200 KB, flash use under 1 MB.” The values here are placeholders; your application decides the real ones.
The scope is the step most often skipped. The vendor timings cover invoke() alone. If your product budget includes camera capture, image preprocessing, and postprocessing, your target must be end-to-end, and it needs its own measurement. Timing invoke() alone will not show whether the frame budget is met.
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Build a reproducible baseline
Run the unoptimized build first, then record enough detail that someone else could repeat it:
- Record the board: chip, board variant, flash and PSRAM size, and the clock setting. The ESP32-S3 maximum is 240 MHz, and that is the clock your results should state.
- Record the software: the ESP-IDF version, the esp-tflite-micro and ESP-NN versions, and the compiler optimization level (
CONFIG_COMPILER_OPTIMIZATION). - Record the model: architecture, operator list, input dimensions, number format (float32 or int8), and file size.
- Name the timed scope, either
invoke()alone or the full frame path, and put it in every result you share. - Use the same input data for every run. Execute a warm-up pass, then a fixed number of timed iterations, and report the median with the minimum and maximum.
- Save the firmware image and the project configuration file (
sdkconfig) alongside the numbers, so each result can be traced to the exact build that produced it.
Measure inference time without false precision
ESP-IDF’s guidance describes two timing approaches that answer different questions.
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- The ESP32-S3-DevKitC development board equipped with ESP32-S3-DevKitC-1-N16R8, a general-purpose Wi-Fi + Bluetooth LE MCU module that integrates complete Wi-Fi and Bluetooth LE functions.
- ESP32-S3-N16R8 cable can be used: USB Type A to Type-C cable or CC cable Note the distinction between the commonly used USB A port to Type-C cable that can only be charged, which cannot be used for communication between YD-ESP32-S3 and the host.
- USB-to-UART Port and ESP32-S3 USB Port (either one or both), default power supply (recommended)
| Method | What it measures | Overhead | Caveat |
|---|---|---|---|
esp_timer_get_time() |
Microsecond wall-clock timestamp | Moderate per call | Wall-clock time includes any time your task spends preempted by other tasks or interrupts. |
cpu_hal_get_cycle_count() |
CPU cycle count | Lower, suited to short routines | Counts are per core. Pin the measured task to one core, or measure inside an interrupt context. To convert to time, divide by the core clock; at 240 MHz one cycle is about 4.2 ns. |
Short routines and flash cache noise
Very short routines can vary with how the binary is laid out in memory and whether the code they run is in the flash cache. Averaging across many repeated calls smooths this out. Placing a small, well-understood hot function in IRAM can reduce it further. Because placement changes the layout, record the placement with each result, and do not compare timings taken before and after a layout change as though only the kernel changed.
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Enable ESP-NN and confirm it is in use
Use the esp-tflite-micro examples as the reference for enabling the optimized kernels in your project. The person-detection example is the one for which Espressif publishes timings, so it is the natural first comparison. Then verify the change yourself:
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- 【Simple programming and debugging】: The ESP32-S3 module makes it easy to program and burn in your ESP32-S3 board via dual USB Type-C ports, with a choice of USB or UART modes.
- 【Multiple Power Saving Modes】: The ESP S3 development board supports multiple low-power modes, which can be configured according to different application scenarios to provide longer battery life.
- 【Dual download modes】: The ESP S3-1 module supports both USB direct connection download and USB to serial port download, providing more flexibility and convenience.
- 【Diverse connectivity options】: The ESP32-S3-1 supports dual-mode Wi-Fi and Bluetooth 5.0 (LE) connectivity for a wide range of smart devices, making it ideal for Internet of Things (IoT) applications.
- Build two firmware images from identical sources: one with the ESP-NN kernels and one without.
- Run both with the same input data and the same timed scope from the baseline.
- Compare your operator list against the kernels the build actually links. An operator without an optimized implementation will not gain the same speedup, so a model dominated by such operators will see less benefit.
- Check that both builds produce matching outputs within the tolerance your application needs. A faster kernel that changes results is not a valid gain.
Read the vendor benchmark in context
The esp-tflite-micro repository reports person-detection invoke() durations for four chips, with and without ESP-NN:
| Chip | Clock in the example | invoke() without ESP-NN |
invoke() with ESP-NN |
Ratio (calculated from the reported values) |
|---|---|---|---|---|
| ESP32-S3 | 240 MHz | 2300 ms | 54 ms | about 43× |
| ESP32-P4 | 360 MHz | 1395 ms | 73 ms | about 19× |
| Classic ESP32 | 240 MHz | 4084 ms | 380 ms | about 11× |
| ESP32-C3 | 160 MHz | 3355 ms | 426 ms | about 8× |
ESP-NN is faster on every chip in the table, but the ratio ranges from about 8× to about 43×. That spread reflects chip, clock, and build conditions as well as the kernels, so the table does not rank the chips. The repository page does not state the model version, input dimensions, memory placement, exact software revisions, or run protocol, and it does not state when the figures were produced. Use the numbers as a sign that the kernels matter on this family, and reproduce the comparison on your own model before relying on any magnitude.
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Quantization: choose by accuracy and on-device time
Espressif’s ESP-DL User Guide for ESP32-S3 describes post-training quantization as a way to shrink a floating-point model and reduce CPU or accelerator latency. It distinguishes two granularities. Per-tensor quantization applies one scale to a whole tensor. Per-channel quantization gives each output channel its own scale. According to the guide, per-channel quantization can improve accuracy on some models, but it takes longer to produce.
Do these 3 things before closing this tab:
1Repair Windows errors before they cause bigger problems2Fix the driver behind crashes, sound loss and screen glitches3Clear out junk files and repair common Windows errors| Variant | What it changes | What to check before accepting it |
|---|---|---|
| Float32 reference | Baseline accuracy and latency | Accuracy on your validation set; invoke() time on the board under the baseline protocol |
| Int8, per-tensor | Smaller model; latency may fall on the device | Accuracy drop against the float reference; every operator supported in the quantized form |
| Int8, per-channel | Can recover accuracy on some models; slower to produce | Whether the accuracy gain justifies the extra conversion time; on-device time measured again with the same protocol |
Accept a variant only when it meets both the accuracy requirement and the on-device timing target. The guide’s comparisons come from Espressif’s own tooling, so run the same comparison on the output of the converter you actually use.
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ESP-IDF settings that change speed and memory
The ESP-IDF Programming Guide v6.1 speed section opens with the sentence “Optimizing execution speed is a key element of software performance.” Each setting below buys speed with something else.
| Setting | Expected effect | Cost or condition | How to check |
|---|---|---|---|
Compiler optimization set to performance (-O2), via CONFIG_COMPILER_OPTIMIZATION |
May speed up some code | Slightly larger binary; more aggressive optimization can expose undefined behavior that already exists in your code | Run your functional tests on the optimized build, not only the timing run |
| QIO or QOUT flash mode instead of the default DIO | Faster code loading and execution | Only when the flash chip and the board’s electrical connections support it | Confirm on the actual board and firmware that the device boots and runs reliably |
| Hot functions placed in IRAM | Avoids instruction-cache misses | IRAM is limited, and the placement can reduce available DRAM | Compare IRAM and DRAM usage after linking |
| Larger cache size | Fewer cache misses | Reduces RAM available to the application | Compare peak RAM with and without the change |
| Priority of the inference task | Lower latency for that task | A priority set too high can starve system work | Confirm that other tasks still receive CPU time under the application’s full load |
Change one setting at a time, rebuild, measure with the same protocol, and keep the before-and-after configuration with the results. Settings can interact, so a combination should be measured as its own step rather than assumed from its parts.
Hardware: what the chip provides and what the board decides
The ESP32-S3 datasheet describes a dual-core 32-bit LX7 processor running up to 240 MHz, with 128-bit vector operations in its processor instruction extensions. The datasheet explains the purpose of those extensions in one sentence: “ESP32-S3 contains a series of new extended instruction set in order to improve the operation efficiency of specific AI and DSP (Digital Signal Processing) algorithms.” (Espressif Systems, ESP32-S3 Series Datasheet v2.24, processor instruction extensions section.)
ESP-NN’s assembly kernels use those instructions, so the chip is half of the optimization. The other half is the board. Available RAM, flash, and peripherals decide which models can be deployed at all, regardless of CPU speed.
Espressif’s repository lists an ESP32-S3-EYE person-detection example, which makes that board the most direct starting point for reproducing the vendor workflow. Before you commit to any ESP32-S3 development board, confirm four things against your project: RAM and flash size, the camera or other peripherals you need, USB or debug access for flashing and profiling, and a power supply that can sustain inference.
Quick Recap
What this guide does not establish
- No independent benchmark with fully specified conditions is cited for this chip and runtime combination. The inference timings above are Espressif’s and cover person detection only.
- The effect of changing model architecture or input size on speed and accuracy is not quantified in the sources cited. Measure both before assuming a lighter architecture or smaller input will run faster.
- The ESP-DL guide’s quantization guidance is Espressif tooling documentation. It does not show that every conversion path behaves identically under TFLite Micro.
- The esp-tflite-micro repository page does not state when its benchmark figures were produced, so treat them as undated.
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