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An L1 cache (Level 1 cache) is the small, fastest cache built closest to a processor core. It keeps copies of the instructions and data the core is most likely to need next, so the core does not have to wait on slower memory. Many processors split this cache into two parts: an instruction cache (L1I) and a data cache (L1D). Exact sizes and layouts vary by processor model, so no single L1 size applies to every CPU.
How an L1 cache serves a processor core
When a core needs an instruction or a piece of data, it checks the L1 cache first. The cache stores data in fixed-size blocks called cache lines, and the outcome of that check falls into one of two cases:
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- L1 hit: the requested cache line is already in L1, so the core is served from that cache.
- L1 miss: the line is not in L1, so it must be obtained from a lower level of the memory hierarchy or another part of the memory system. A miss adds delay.
Intel’s VTune Profiler User Guide (2023) describes L1 as the first and shortest-latency level of the hierarchy, defines an L1 hit-rate metric, and notes that performance can suffer when active data is repeatedly evicted from the cache. It also states that data moves between levels in cache-line units. Performance analysis therefore looks at how often hits occur and how replacement behaves, not only at how big the cache is.
Instruction cache and data cache
“L1 cache” is the umbrella term. Two names are used for its parts:
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- L1I or instruction cache: holds the instructions the core fetches to execute.
- L1D or data cache: holds the program data the core reads and writes.
Separating the two lets the processor fetch instructions and access data without the two requests competing for the same storage. Intel’s datasheet for the Core i3 and Core 3 N-Series (page dated 2025-01-07) and its Core Ultra datasheet (page dated 2025-05-09) both document separate instruction and data caches. The Core Ultra datasheet also states that first-level caches are not shared between physical cores. Not every processor uses this exact split, so check the documentation for your model rather than assuming it.
L1 cache compared with RAM
L1 cache and RAM sit at opposite ends of the memory hierarchy. L1 is a small block of fast memory on the processor itself, measured in kilobytes per core. System RAM is a much larger pool, measured in gigabytes, that sits outside the processor and is shared across the whole system. The core reaches L1 far sooner than it reaches RAM, which is why the cache exists. A value that lives only in RAM must be fetched, and a cache miss at L1 is one of the steps that can lead to that fetch.
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L1 cache sizes differ by processor
L1 capacity and organization are set by the processor design, so the same label can mean different things on different chips. The table below lists the values documented in the sources named. These are examples for the listed models, not universal figures.
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|---|---|---|---|---|
| Intel Core Ultra (Meteor Lake), Core Ultra datasheet (2025-05-09) | P-core | 48 KB | 64 KB | First-level caches not shared between physical cores |
| Intel Core Ultra (Meteor Lake), Core Ultra datasheet (2025-05-09) | E-core | 32 KB | 64 KB | First-level caches not shared between physical cores |
| Intel Core i3 and Core 3 N-Series, datasheet (2025-01-07) | Family-level figure | 32 KB | 64 KB | Applies to this family; not stated for other families |
| AMD/Xilinx Zynq 7000 Cortex-A9, UG585 v1.15 (2026-02-06) | Cortex-A9 (each of two processors) | 32 KB | 32 KB | 4-way set associative; 32-byte cache lines |
The Zynq 7000 is an embedded system-on-chip rather than a desktop or laptop CPU, which is one reason its values differ from the Intel rows. Where a row shows a detail as “not stated,” the cited source for that row does not give the value.
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Cache-line size
A cache line is the unit in which data is stored and moved between cache levels. Its size is not the same everywhere. Intel’s VTune guide (2023) describes 64-byte cache lines in the Intel context it covers. The Zynq 7000 technical reference manual (UG585, version 1.15, released 2026-02-06) gives 32-byte L1 cache lines for the Cortex-A9. Line size should therefore be read from the documentation for the specific processor.
How to find the L1 cache size of your own CPU
- Identify the exact model. On Windows 10 or 11, open
Settings > System > Aboutand read the processor name. On Linux, run the command in the next step. - Check the manufacturer’s documentation for that model. Match the full model number, not only the product family, because the same family can contain several core types or variants.
- On Linux, run
lscputo see the cache sizes the system reports:lscpu | grep -i "cache"The output lists L1d and L1i with the number of instances. Use the per-core figure when comparing against a datasheet.
On hybrid processors that combine P-cores and E-cores, a single total can hide the difference between the two core types. Read the per-core-type values separately.
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Is a bigger L1 cache better?
A larger L1 cache can hold more of the working data, which can raise the hit rate for some workloads. It is not automatically faster. Larger caches generally take longer to access than smaller ones, and the benefit depends on how the software uses memory. Capacity alone does not determine overall performance; the other cache characteristics and the rest of the processor design matter too.
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What to compare when comparing processors
When two processors are compared, check the following for the exact models being compared:
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- L1 data capacity and L1 instruction capacity
- Whether each cache is private to a core or shared
- Associativity, where the documentation states it
- Cache-line size
- Core type, particularly on hybrid designs with P-cores and E-cores
Comparisons across different families or vendors are only meaningful when each value comes from the same kind of source and refers to the same model.
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