Do these 3 things before closing this tab:
1Fix the driver behind crashes, sound loss and screen glitches2Repair Windows errors before they cause bigger problems3Scan for outdated or missing drivers - takes under a minuteAn FP8 tensor at the edge of a computation does not prove that the compiled convolution uses FP8 arithmetic. XLA’s current NVIDIA GPU compiler includes a pass that can replace an FP8 cuDNN convolution fusion with BF16 when cuDNN has no usable FP8 plan for the target GPU and convolution configuration, provided the BF16 replacement is supported. That is a specific fallback—not evidence that every unsupported convolution runs in FP32, and not confirmation of the “half” statistic or one-line fix in the title that inspired this topic.
Why an FP8 graph can produce a wider-precision convolution
FP8 describes a requested or represented tensor type; it does not, by itself, identify the arithmetic used by the backend kernel. During compilation, XLA must lower the operation to an implementation supported by the target GPU and the available cuDNN plans for that particular convolution.
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In the current OpenXLA NVIDIA GPU compiler source, the ConvFp8Fallback pass rewrites FP8 cuDNN convolution fusions to BF16 when cuDNN has no FP8 plans for the target GPU. The pass is placed after convolution-fusion rewriting and before autotuning enumerates plans. Its purpose is to avoid a hard failure when no FP8 plan is available. The relevant implementation is in OpenXLA’s NVIDIA GPU compiler source.
The change description for OpenXLA PR #40021 says the compiler probes cuDNN at compile time and rewrites when the FP8 plan is unsupported but a BF16 replacement is supported. It gives grouped convolutions on sm_120 as an example of configurations that can lack FP8 support. Those details are implementation- and version-dependent: they do not establish the behavior of every GPU, cuDNN release, shape, or convolution.
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What “FP8” at the graph boundary does—and does not—tell you
It identifies a tensor type, not necessarily the selected kernel
HLO showing FP8 inputs or outputs establishes the types at those points in the graph. It is not sufficient evidence of the arithmetic inside a convolution fusion or of the cuDNN plan ultimately selected. To determine that, inspect compiler transformations and backend implementation evidence for the compiled workload.
Higher-precision fallback does not always mean FP32
The current convolution fallback described above is FP8 to BF16 when the required conditions are met. Do not summarize it as “unsupported FP8 convolutions silently run in f32.” XLA may handle other operations or compilation paths differently. For example, an OpenXLA discussion about GPUs below compute capability 89 concerns dot operations and describes an FP16 upcast path; it is useful context for fallback behavior, but it is not documentation of convolution lowering. See the OpenXLA discussion on FP8 fallback and HLO dumps.
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How to check what your convolution compiled into
- Record the exact workload and environment. Note the XLA framework and version (such as JAX or TensorFlow), CUDA and cuDNN versions, GPU model and compute capability, input and filter shapes, strides, padding, group count, and precision settings. Plan availability can depend on this combination.
- Dump HLO across compiler passes. The OpenXLA discussion suggests enabling pass dumps with
--xla_dump_hlo_pass_re=.*throughXLA_FLAGS. Confirm that syntax is accepted by your installed build, then retain the dumps around convolution fusion rewriting and later lowering. - Compare the convolution before and after relevant transformations. Look for conversion operations around the convolution, changes in the convolution or fusion instructions, and any evidence that the FP8 fusion was rewritten. An FP8 input or output alone does not settle the question.
- Check backend implementation evidence. Where available, inspect the selected cuDNN plan or generated kernel information for the same compiled executable. Tie the evidence to the exact shape and convolution parameters rather than assuming a result transfers to other workloads.
- Separate dtype evidence from performance claims. A conversion or fallback can establish a change in precision path; it does not, by itself, establish how much faster or slower the workload is, or what share of a model’s convolutions are affected.
How to interpret reports of FP8 boundaries with wider internal work
OpenXLA issue #17887 contains a reported FP8 matmul scaling regression whose HLO converts FP8 operands to BF16, performs a BF16 dot, and converts the result back to FP8. It is a concrete illustration of why boundary dtypes can mislead, but it concerns matmul, not convolution, and should not be treated as proof of universal convolution behavior. See OpenXLA issue #17887.
The OpenXLA FP8 RFC provides design context: it describes recognizing scaled dot and convolution patterns for GPU-library rewrites, while noting that operations without appropriate native support may use higher-precision arithmetic. This design explanation is not a promise that a specific shape and GPU has an FP8 cuDNN plan today.
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What is—and is not—verified about the “half” and the one-line fix
A DEV Community compiler-topic listing identifies Yehor Cherednichenko’s article, dated September 17, with the title “Half of my FP8 convolutions were silently running in f32 – a one-line XLA fix.” The article body was not available in the accessible material. As a result, its exact fix, software and hardware versions, measurement method, benchmark, and the denominator behind “half” cannot be verified. Treat that wording as the author’s title, not as an independently established rate or a generally applicable XLA diagnosis. See the DEV Community compiler topic listing.
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