A semiconductor fab is the specialized factory where a chip’s circuit structures are built on a silicon wafer. It uses repeated cycles of patterning, adding or changing materials, removing selected areas, and inspecting the results. The wafer then moves to separate back-end steps—testing, dicing, assembly, and packaging—before it becomes a packaged chip. The Semiconductor Industry Association (SIA) describes fabrication as the front-end stage of semiconductor manufacturing.
What a semiconductor fab does—and what it does not do
A fab, short for fabrication facility, makes integrated circuits on wafers. Chip design is an upstream activity: engineers define the circuit and its physical layout, and the fab follows a process designed for that particular product. Fabrication forms many individual chip areas, called dies, across a wafer.
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The fab is one part of a larger production chain. After front-end fabrication, wafers are electrically tested, cut into individual dies, and sent through back-end assembly and packaging. Packaging protects a die and provides electrical connections to other components. A packaged chip can then be integrated into a circuit board; the fab does not make a finished phone or computer. SIA’s value-chain overview and its back-end manufacturing overview distinguish these stages.
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Scan for outdated or missing drivers - takes under a minuteDriver Scan →Clear out junk files and repair common Windows errorsFree Scan →How a wafer becomes a set of circuit structures
Wafer processing is best understood as repeated pattern-making, not as a machine carving a complete chip from silicon. A simplified cycle prepares or coats the wafer, exposes a pattern in light-sensitive material, develops that material, processes the areas left exposed, and checks the result. Cleaning and surface flattening help prepare the wafer for further layers.
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The sequence is not one universal recipe. The materials and operations, and the order in which they are used, depend on the device being made. Broadly, the fab builds up and modifies structures layer by layer until the intended devices and electrical connections have been formed. SIA says fabrication steps repeat several hundred times; in its 2026 testimony it describes process flows with 8–20 patterned layers and, for some processes, up to hundreds. Those figures describe different scopes and should not be treated as a single layer count that applies to every chip. SIA’s front-end overview explains the recurring process families.
1. Prepare and coat the wafer
The wafer surface is cleaned and prepared for the next operation. For lithography, a light-sensitive material called photoresist is applied so a pattern can be transferred onto the wafer.
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2. Transfer a pattern with photolithography
A mask or reticle carries a pattern. A projection system transfers a reduced image of it onto the photoresist. After exposure and development, some areas are protected by resist while others are exposed for subsequent processing. Lithography defines where later operations act; it is not a tiny saw cutting out a finished chip. ASML’s lithography explanation describes this pattern-transfer process.
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DUV and EUV are different light technologies used for lithography. Which is used depends on the layer and process; it would be inaccurate to assume that every wafer layer is patterned with EUV. ASML’s chipmaking overview discusses how lithography fits into chip production.
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3. Add films, remove material, or change electrical properties
Depending on the step, the patterned wafer may receive a thin deposited film, have selected material removed by etching, or undergo doping. Deposition adds material; etching removes chosen regions; doping changes the electrical properties of selected areas. These operations work together to create device structures and, in later layers, electrical connections.
4. Flatten, clean, measure, and repeat
Planarization helps restore a flat surface so additional layers can be built accurately. Cleaning removes unwanted residue, while metrology and inspection check dimensions, alignment, and process results. If a layer does not meet requirements, it can affect later processing, which is why measurement and inspection are part of the manufacturing flow rather than a final-only check.
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These operations recur as the chip’s structures are built. The precise process flow varies by product, so a simplified cycle is a guide to the logic of fabrication, not a fixed list of steps every chip follows in exactly the same order. SIA’s 2026 testimony says device fabrication can involve well over 1,000 precise steps; that is an attributed description, not a fixed count for every product or facility. SIA’s testimony provides that process context.
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1Clear out junk files and repair common Windows errors2Scan for outdated or missing drivers - takes under a minute3Repair Windows errors before they cause bigger problemsWhy fabs use cleanrooms
Particles and contamination can interfere with very small structures, so fabs control the environment around wafer processing. ASML describes cleanrooms that filter and recirculate air, control air quality and temperature, and use special garments to reduce particles introduced by people. Those are elements of ASML’s description, not a universal specification for every fab. ASML’s overview explains the role of cleanroom controls.
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What happens after the wafer leaves fabrication
Front-end fabrication produces a wafer containing many dies. Electrical testing helps identify which dies work. The wafer is then diced, separating the dies, and those selected for use move through back-end operations such as die attach, electrical bonding, and encapsulation. Further testing checks the resulting packaged chips. SIA’s back-end overview describes these steps.
Who owns and operates fabs?
Companies organize design and manufacturing in different ways. These are business models, not different wafer-processing recipes.
| Business model | Who designs? | Who manufactures? |
|---|---|---|
| Integrated device manufacturer (IDM) | The company designs its chips. | The company also manufactures them. |
| Foundry | Customers provide chip designs. | The foundry manufactures chips for customers. |
| Fabless company | The company focuses on chip design. | It outsources fabrication, often to a foundry. |
ASML’s overview of chipmaking discusses these roles in the industry.
Why building a fab is a major undertaking
Fabs combine specialized manufacturing equipment with tightly controlled production environments and complex process flows. In its 2026 testimony, SIA estimated that a leading-edge fab could require $20–25 billion in investment across construction and manufacturing equipment. This is an attributed estimate, not a current quote or a universal cost for every fab; facility scope and manufacturing requirements differ. The testimony also says the U.S. semiconductor industry reinvests an average of 20% of revenue in R&D, a figure with that specific U.S. industry scope. SIA’s 2026 testimony provides the estimates and context.
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