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What Is a Control-Flow Graph? Nodes, Edges, and How It Works

A control-flow graph (CFG) represents possible execution paths through a function as basic blocks connected by directed edges.

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A control-flow graph (CFG) is a directed graph that shows the possible paths execution can take through a function or procedure. Its nodes are basic blocks—straight-line sequences of actions—and its arrows show the possible transfers of control from one block to another.

What are the nodes in a control-flow graph?

Each node represents a basic block: a sequence of instructions or statements that executes in order, without branching into or out of the middle. A block has one entry and one exit; the instruction or action at its end determines what can happen next. LLVM describes a basic block as a single-entry, single-exit section ending in a terminator instruction (LLVM Programmer’s Manual).

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Within a block, statement order captures unconditional flow. In a source-level Clang CFG, for example, statements appear in order inside blocks, while conditional control flow is represented by edges between blocks (Clang CFE Internals Manual).

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What do the edges represent?

A directed edge indicates a possible transfer from the end of one block to the beginning of another. If a block ends with a conditional branch, it can have multiple outgoing edges—one for each possible successor. The terminator must select which successor execution takes. Edges can also point back to an earlier block, representing a loop.

The graph describes possible control transfers, not a guarantee that every edge will be followed in a particular run. LLVM Flang defines a CFG as basic blocks connected by directed edges for possible transitions, including transitions from a block to itself (LLVM Flang: Control Flow Graph).

How do branches and loops appear in a CFG?

Branch

Suppose a function tests a condition and then either performs one action or another. The test ends its block with a decision, and two outgoing edges lead to the alternative blocks. Those paths may later join at a block that follows either outcome.

Loop

A loop is shown by an edge that returns to an earlier block, such as the block that checks a loop condition. The return edge represents another possible iteration; a separate edge can lead out of the loop when its condition is no longer satisfied.

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These are structural possibilities. A CFG alone does not say how often a loop runs or prove which branch is taken for a particular input.

How do compilers use control-flow graphs?

CFGs give compilers and other program-analysis tools a structure for reasoning about what might execute next. Clang notes that CFGs support flow-sensitive and path-sensitive analysis. A data-flow analysis can propagate facts—such as information about possible values—along graph edges and repeat the calculation until it reaches a fixed point, where another pass produces no change (Clang: Data Flow Analysis: An Informal Introduction).

At a branch, an analysis can track facts along each possible path; where paths rejoin, it can combine the information from those paths. This makes the CFG useful for analyses that need to account for execution order and alternative routes through a function.

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Do all CFGs have explicit entry and exit nodes?

No. Entry and exit blocks are conventions used by particular representations, not a requirement of every CFG. Clang’s function CFG includes special empty entry and exit blocks: the entry has no incoming edges, and the exit has no outgoing edges (Clang CFE Internals Manual). Other graph forms may handle these boundaries differently.

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Language features can also affect a graph’s entry structure. LLVM Flang notes that a Fortran subprogram may have multiple entry points through the ENTRY statement (LLVM Flang: Control Flow Graph). So when inspecting a CFG, check whether it represents source code or an intermediate representation and how that representation handles entry points, exits, and language-specific transfers.

In one sentence

A control-flow graph models a function’s possible execution paths as directed connections between basic blocks, with each block’s terminator determining which successor or successors are possible.

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