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Si Lab: Build and Analyze a Three-Stage Discrete BJT Amplifier

A practical Si Lab guide to cascading three NPN common-emitter stages, understanding inversion and saturation, adding 1 MΩ negative feedback, measuring transfer gain, and simulating the circuit in SPICE.

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This Si Lab project builds a three-stage, directly coupled common-emitter amplifier from discrete NPN transistors. The collector of each stage drives the base of the next, producing a very large open-loop voltage gain and an overall inverted response. A 1 MΩ resistor from the third collector back to the first input adds global negative feedback, reducing sensitivity and making the operating point easier to control.

It is an educational DC amplifier experiment, not a finished audio, RF, precision, or power amplifier. The simplified biasing, absent emitter resistors, direct coupling, and generic SPICE model make it ideal for learning—but unsuitable as a production design.

What the circuit demonstrates

A multi-stage amplifier cascades several amplifier sections: the output of one becomes the input of the next. If the individual voltage gains are G1, G2, and G3, the approximate open-loop relationship is:

Gtotal = G1G2G3

For small-signal work, use Av = ΔVout/ΔVin, or 20 log10|Av| in decibels. During this project, however, the useful observation is often the large-signal DC transfer: how collector voltages change as the potentiometer changes the first-stage input.

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Circuit topology and parts

The project is the “Si Lab – Multi-stage Amplifier” in the Discrete Semiconductor Circuit Projects series. Its schematic uses three NPN common-emitter stages, each with a 10 kΩ collector resistor and a 100 kΩ resistor feeding the following base. The third collector is the output. A 10 kΩ linear potentiometer supplies the first-stage input, and the optional 1 MΩ resistor returns the third collector signal to that input node.

Part Quantity Role or qualification
2N2222 or 2N3403 NPN transistor 3 Suggested alternatives; verify the exact package pinout and ratings before wiring.
6 V battery 2 Connected in series for a nominal 12 V supply; actual voltage varies with battery type and state of charge.
10 kΩ linear potentiometer 1 Manual input adjustment.
1 MΩ resistor 1 Global feedback resistor, added after the open-loop test.
100 kΩ resistors 3 Inter-stage/base input resistors.
10 kΩ resistors 3 Collector load resistors.

You will also need a solderless breadboard, jumpers, and a digital multimeter. A current-limited bench supply is a controllable alternative to batteries; an oscilloscope is useful for waveform and oscillation checks but is not required for the basic DC experiment.

Why three common-emitter stages invert

As base current rises, collector current rises. The increased current creates a larger voltage drop across the collector resistor, so collector voltage falls. One common-emitter stage therefore inverts. Two stages restore the original polarity, while three stages invert it again.

  • Stage 1: inverted.
  • Stage 2: non-inverted relative to the original input.
  • Stage 3: inverted overall.

That DC polarity is why a connection from the third collector to the first input is intended to be negative feedback. Polarity alone does not prove stability at every frequency: loop gain, transistor capacitance, wiring, loading, and phase shift still matter.

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Build safely in stages

1. Check parts and supply

  • Read the datasheet for the exact transistor manufacturer and package. “2N2222” packages do not all use the same lead arrangement.
  • Identify resistor values with color codes or a meter.
  • Confirm the battery series polarity or set a bench supply to a nominal 12 V with a conservative current limit.
  • Establish one common ground and check for supply-to-ground shorts before inserting transistors.

2. Build and test one stage

Construct a common-emitter stage first: emitter to the common reference, collector through 10 kΩ to the positive rail, and base driven through its 100 kΩ resistor. Measure collector-to-ground voltage before adding another stage. A correctly wired low-power stage should not make the transistor noticeably hot.

3. Cascade the stages

  1. Connect the first collector to the second-stage base through the second 100 kΩ resistor.
  2. Connect the second collector to the third-stage base through the third 100 kΩ resistor.
  3. Connect the potentiometer as the first-stage input control.
  4. Leave the 1 MΩ feedback resistor disconnected initially.

Recheck emitter, collector, base, rail, and ground connections before applying power.

Open-loop behavior: why adjustment is difficult

With feedback omitted, the three stage gains multiply. Even moderate gain in each section can drive the final transistor rapidly toward cutoff or saturation. The third collector may spend most of its adjustment range near a supply extreme, making the circuit look more like a switching transition than a linear amplifier.

Turn the potentiometer slowly and measure the third collector voltage. Also measure each collector in turn. The expected chain is that an increasing input tends to make the first collector fall, the second rise, and the third fall again. Tiny potentiometer movements can cause large output changes because the open-loop gain is high and the directly coupled bias points interact.

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Add the 1 MΩ global feedback resistor

Power down, then connect the 1 MΩ resistor from the third transistor’s collector to the first-stage input node—the same node receiving the potentiometer and first 100 kΩ resistor. Do not connect it to an unintended base or collector; the wrong node can reverse the intended feedback or create abnormal loading.

The returned signal opposes the original input in the intended low-frequency operating region. Compared with the open-loop circuit, expect a less “touchy” control, reduced effective gain, and improved operating-point repeatability. A smaller feedback resistance generally gives stronger feedback and lower gain; a larger value gives weaker feedback and greater sensitivity. This is a qualitative trend, not an exact op-amp formula: transistor bias, finite output resistance, base-emitter behavior, loading, and the feedback network itself all affect the result.

Measure the transfer and gain

Record collector-to-ground voltages at several potentiometer settings. Use a table like this, filling in actual measurements:

Input voltage Stage 1 collector Stage 2 collector Stage 3 collector (output)
0.0 V
0.2 V
0.4 V
Continue in 0.2 V steps as useful

Calculate a local end-to-end slope from two points in the approximately linear region:

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Av = (Vout,2 − Vout,1) / (Vin,2 − Vin,1)

Do not use points where a transistor is clearly in cutoff or saturation. A handheld meter reports DC or averaged behavior; it cannot reveal bandwidth, clipping waveforms, noise, or high-frequency oscillation. Use an oscilloscope if you extend the experiment to dynamic signals.

Change the feedback resistance

Repeat the measurements with values below and above 1 MΩ. Compare the usable input range, output slope, and onset of clipping.

  • Lower resistance: normally stronger feedback, lower gain, and greater stabilization; excessive loading can alter the first-stage bias.
  • Higher resistance: normally weaker feedback, higher gain, and a greater chance of nonlinear behavior.
  • Extreme values: may provide negligible feedback or load the input enough to change the intended operating point.
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SPICE DC simulation

The source provides this netlist for a three-stage circuit:

Multi-stage Common-emitter Amplifier
vsupply 1 0 dc 12
vin 2 0
r1 2 3 100k
r2 1 4 10k
q1 4 3 0 mod1
r3 4 7 100k
r4 1 5 10k
q2 5 7 0 mod1
r5 5 8 100k
r6 1 6 10k
q3 6 8 0 mod1
rf 3 6 1meg
.model mod1 npn bf=200
.dc vin 0 2.5 0.1
.plot dc v(6,0) v(2,0)
.end

It sweeps the input from 0 to 2.5 V in 0.1 V increments and plots v(6,0), the final collector voltage, against v(2,0), the input voltage. Change rf to compare feedback strengths and identify the approximately linear part of the transfer curve.

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The netlist uses a generic NPN model with bf=200, not a manufacturer model for a particular 2N2222 or 2N3403. Simulated voltages therefore need not match the breadboard. The physical project lists two nominal 6 V batteries, while the netlist specifies 12 V directly; these are nominally comparable supplies, not identical models of battery behavior. This is a DC sweep, not an AC frequency-response analysis.

Some SPICE dialects reject the bare vin 2 0 source declaration. If so, retain the original netlist for reference and try the compatibility form VIN 2 0 DC 0. Plot and device syntax can also vary by simulator.

Troubleshooting

Output stuck near the positive rail

  • Check for cutoff, a wrong transistor pinout, reversed collector/emitter, a misplaced collector resistor, or missing feedback.
  • Disconnect power, verify the exact package datasheet, test each stage alone, then reconnect stages one at a time.

Output stuck near ground

  • Look for saturation, a shorted collector resistor, excessive base drive, a damaged transistor, or a missing supply reference.

No apparent gain

  • Confirm the common ground, potentiometer wiring, input/output nodes, and each collector-to-next-base connection.
  • Check that measurements are taken in the active region; a meter may average a changing signal.

Unexpected positive feedback or oscillation

  • Recheck that the resistor runs from the third collector to the first input node.
  • Shorten breadboard jumpers, improve supply wiring, and consider supply decoupling.
  • Remember that intended DC negative polarity does not guarantee high-frequency stability.

Transistors become warm

Remove power immediately. Check orientation, supply polarity, collector resistors, accidental shorts, and excessive base drive. Normal low-power operation should not require visibly hot transistors.

How this differs from a practical amplifier

The project deliberately omits features normally used for predictable signal amplification:

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  • Emitter resistors for thermal and bias stabilization.
  • Voltage-divider bias networks to establish controlled quiescent currents.
  • Coupling and bypass capacitors where AC isolation or gain shaping is needed.
  • Defined load resistance, supply decoupling, headroom, and frequency-response analysis.
  • A complete stability analysis and a transistor model matched to the selected device.

Direct coupling makes the experiment simple but lets each stage’s DC operating point influence the next. It should not be presented as a hi-fi amplifier, precision DC instrument, RF amplifier, speaker driver, or replacement for a properly biased op-amp circuit.

Useful extensions

  • Build only two stages and verify that the overall polarity changes from inverted to non-inverted.
  • Add emitter resistors and compare gain and bias stability.
  • Compare direct coupling with capacitive inter-stage coupling.
  • Replace the generic SPICE model with manufacturer models and compare devices.
  • Sweep supply voltage, feedback resistance, and load resistance.
  • Run an AC analysis and inspect clipping and oscillation with an oscilloscope.

Primary project reference

The original schematic, breadboard illustration, parts list, experiment instructions, and netlist are published at All About Circuits’ Multi-stage Amplifier experiment.

Quick Recap

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Product prices and availability are accurate as of the date/time indicated and are subject to change. Any price and availability information displayed on Amazon at the time of purchase will apply.

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