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A C or C++ pointer is not simply an integer containing a hardware address. It is a typed language value that designates an object or function under rules about lifetime, bounds, alignment, and type. Compilers commonly implement pointer operations with address-like values and machine loads or stores, but the language meaning and the hardware mechanism are not the same thing.
That distinction matters when tracing a pointer toward hardware: a process usually uses virtual addresses, a CPU translates them to physical memory, and a device may use a separate bus or DMA address. Device registers add another layer: they must be mapped and accessed with platform-appropriate interfaces and ordering rules.
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What a pointer means in C and C++
The C and C++ abstract machines describe programs in terms of objects, storage, and operations on values. A pointer is a value that can designate an object or function, be one-past an object, be null, or be invalid, depending on how it was formed and what has happened to the designated object. C and C++ rules constrain which operations are valid; a pointer is not a license to access any location whose numeric address happens to look plausible. See the C++ pointer summary at cppreference: Pointers and the C object model at cppreference: Objects and alignment.
Implementations often represent pointers using address-like machine values, which is why pointer code can be useful close to the machine. But representation is not the whole contract. Compiler reasoning follows language rules, and those rules can make an access invalid even if an address numerically matches storage that exists. A 2018 C committee discussion paper on pointer provenance explores this distinction; it is useful context, not normative current standard wording: WG14 N2311.
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Address-of and dereference operate on objects
Consider:
int x = 7;
int *p = &x;
int y = *p;
&x forms a pointer designating the object x. In the initializer for y, *p is evaluated to access the stored int value. As the GNU C Language Manual puts it, “The unary operator ‘*’ gets the data that a pointer points to—this is called dereferencing the pointer.” (GNU C Language Manual, “Pointers”.)
That source expression does not promise that a processor will perform a physical RAM read at a fixed numeric address. The compiler may keep the value in a register, eliminate an unnecessary access, or transform operations while preserving the program’s required behavior. Validity depends on the object and the language rules, including lifetime, type, and alignment.
When an access is invalid
- A null pointer does not designate an object to access.
- A dangling pointer may refer to storage whose object lifetime has ended.
- A misaligned pointer or an access through an unsuitable type can violate language requirements.
- Pointer arithmetic is constrained to the relevant array object and its one-past position; an in-range-looking numeric address does not itself authorize an access.
The C++ reference explains pointer arithmetic and the one-past rule at cppreference: Pointer arithmetic. The C object model also describes object representations, effective type, and alignment at cppreference: Objects and alignment. In both languages, dereferencing a pointer that does not validly designate a suitable live object is not a safe way to read or write arbitrary memory.
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On an operating system using virtual memory, an application normally works with virtual addresses. The CPU’s translation machinery maps those addresses to CPU physical memory locations, subject to the process’s mappings and permissions. A pointer value in a process therefore should not be casually described as a physical RAM address.
Devices may use a third address domain: bus or DMA addresses. Those are not necessarily the same as either CPU virtual or CPU physical addresses. An IOMMU or platform-specific bus mapping can translate or constrain a device’s view independently. Linux’s 5.10 address-mapping documentation explicitly distinguishes CPU virtual, CPU physical, and bus addresses and warns against assuming simple conversions: Linux kernel 5.10: Bus-Independent Device Accesses. That page is useful for the conceptual distinction; it labels some conversion functions as superseded and should not be treated as current driver instructions.
Three address domains, three different jobs
| Address kind | Used by | What it identifies |
|---|---|---|
| CPU virtual address | Application or kernel code executing on the CPU | An address in a process or kernel virtual address space, subject to mapping and access rules. |
| CPU physical address | CPU memory-translation hardware and physical memory system | A physical memory location reached through translation, where mappings permit it. |
| Bus or DMA address | A device or bus-facing DMA mechanism | An address in the device’s addressing domain; platform mappings or an IOMMU may make it differ from CPU addresses. |
The practical point is not that every system has three visibly different numbers, but that the domains have different meanings. A pointer cast or arithmetic operation does not convert a process pointer into a device-ready DMA address.
Memory-mapped I/O is not ordinary pointer access
Memory-mapped I/O (MMIO) exposes device registers through an address window that the CPU can access with load/store-like operations. The fact that the CPU instruction resembles a memory access does not make the register window ordinary RAM: devices may give reads and writes side effects, and the platform defines how the mapping and access must work.
The register window must be discovered and mapped through the operating system’s interfaces. In Linux kernel drivers, the relevant family includes ioremap for mapping and typed accessors such as readX/writeX or ioreadX/iowriteX; exact APIs and guarantees depend on kernel version and architecture. The Linux driver documentation says device physical addresses should not simply be used directly and describes mapping them to CPU virtual addresses for access: Linux kernel 6.2: Bus-Independent Device Accesses.
This is kernel-driver guidance, not a portable hosted C or C++ recipe. Casting an arbitrary numeric address to a pointer in a user-space program is not a universal way to access hardware. A device must be exposed and mapped through the operating system and platform mechanism intended for that purpose.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.Why I/O ordering and volatile are separate concerns
Correct device communication can depend on the order in which accesses become visible. A compiler can transform ordinary operations according to language rules, while a CPU, cache, or interconnect may reorder, combine, cache, or defer operations. Device accessors and barriers are designed to provide particular guarantees on particular platforms; which guarantee applies depends on the accessor, mapping attributes, architecture, and device.
Linux kernel documentation states: “Inside of the Linux kernel, I/O should be done through the appropriate accessor routines – such as inb() or writel() – which know how to make such accesses appropriately sequential.” This is guidance in the “Accessing Devices” section of Linux kernel 6.4: Memory Barriers. A memory barrier is not a substitute for using the right mapping and accessor. Nor does a barrier intended only for synchronization between CPUs necessarily provide the device-ordering guarantee needed by a driver; Linux documents distinctions between barrier types and device I/O in the same section.
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What volatile does—and does not—promise
C and C++ volatile affects how the compiler treats certain accesses to volatile objects. It does not, by itself, guarantee CPU ordering, cache coherency, bus completion, atomicity, or a portable MMIO interface. The Linux kernel’s guidance is to use appropriate I/O accessor routines rather than direct ordinary-pointer accesses, because direct access does not work across all architectures (Linux kernel 6.4: Memory Barriers).
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Keep the layers distinct: language rules determine whether a source-level operation is valid; compiler behavior determines how valid operations are emitted; CPU and platform mechanisms govern memory translation and ordering; and the device interface determines what its registers mean. volatile addresses only part of the compiler layer.
A useful mental model
- At the language level: a pointer designates an object or function under type, lifetime, bounds, and alignment rules.
- At the process level: a pointer commonly corresponds to an address in a virtual address space, not a universally meaningful physical address.
- At the hardware level: CPU physical addresses and device bus or DMA addresses may be distinct domains.
- At the device interface: MMIO needs platform-specific mapping, accessors, and ordering behavior; pointer syntax alone does not supply those guarantees.
For broader background on machine-level representations and virtual address spaces, Carnegie Mellon’s preview of Computer Systems: A Programmer’s Perspective, second edition, is available at the CS:APP second-edition materials page.
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