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Clear out junk files and repair common Windows errorsFree Scan →Fix the driver behind crashes, sound loss and screen glitchesFind Drivers →Repair Windows errors before they cause bigger problemsFix Now →Start with Google’s approximate model-load memory figure for the exact Gemma 4 variant and precision, then divide by TPU v5e’s 16 GB of HBM per chip and round up. That gives a rough lower bound on chip count—not a serving guarantee. Context and KV cache, runtime buffers, and concurrency need additional memory. There is no reproducible official tokens-per-second benchmark for Gemma 4 on v5e in the sources cited here, so throughput must be measured on the intended stack and workload.
Choose the exact Gemma 4 variant first
Gemma 4 has five variants with different parameter counts, architectures, and context limits. The E2B and E4B names refer to effective parameter counts; their full counts, including Per-Layer Embeddings, are larger. For estimating loaded weights, use the published model-load figures rather than multiplying only the effective counts.
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| Variant | Parameter count in Google’s model card | Layers | Sliding window | Context limit | Input modalities listed |
|---|---|---|---|---|---|
| E2B | 2.3B effective; 5.1B including embeddings | 35 | 512 tokens | 128K tokens | Image and audio |
| E4B | 4.5B effective; 8B including embeddings | 42 | 512 tokens | 128K tokens | Image and audio |
| 12B Unified | 11.95B | 48 | 1,024 tokens | 256K tokens | Image and audio |
| 26B A4B MoE | 25.2B total; 3.8B active | 30 | 1,024 tokens | 256K tokens | Image |
| 31B | 30.7B | 60 | 1,024 tokens | 256K tokens | Image |
These architecture and modality details come from Google AI for Developers’ Gemma 4 model card. Active parameters are not the same as parameters that must be loaded: Google says the 26B A4B model’s full parameter set must be loaded for fast routing and inference. Its memory requirement is therefore closer to a dense model with a similar total parameter count than to a 4B model. For multimodal requests, record whether the workload includes images or audio and how inputs are encoded; modality changes preprocessing and workload costs.
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1Clear out junk files and repair common Windows errors2Fix the driver behind crashes, sound loss and screen glitches3Repair Windows errors before they cause bigger problemsWhat Google’s model-load memory numbers include
Google AI for Developers’ Gemma model overview publishes approximate GPU or TPU memory requirements to load each model, accounting for parameter count, quantization, and a stated 20% overhead for loading additional items. Google says these figures may vary with the inference tool and environment. They are not total serving-memory requirements.
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| Gemma 4 variant | BF16 model-load estimate | SFP8 model-load estimate | Q4_0 model-load estimate | BF16 capacity floor at 16 GB per chip |
|---|---|---|---|---|
| E2B | 11.4 GB | 5.7 GB | 2.9 GB | 1 chip |
| E4B | 17.9 GB | 8.9 GB | 4.5 GB | 2 chips |
| 12B | 26.7 GB | 13.4 GB | 6.7 GB | 2 chips |
| 26B A4B | 57.7 GB | 28.8 GB | 14.4 GB | 4 chips |
| 31B | 69.9 GB | 34.9 GB | 17.5 GB | 5 chips |
The memory values in the first three numeric columns are Google’s approximate model-load estimates, not measurements of a complete serving process. The last column is a derived BF16 floor: each published GB estimate was divided by TPU v5e’s nominal 16 GB HBM per chip and rounded up. The arithmetic treats the reported GB and per-chip HBM figures as suitable for a rough comparison; it does not verify a particular sharding plan or implementation.
Google’s caveat is explicit: “The estimates in the preceding table only account for the memory required to load the static model weights. They don’t include the additional VRAM needed for supporting software or the context window.” The same limitation applies when using these figures to plan TPU serving: prompt and generated tokens increase context-window/KV-cache memory dynamically, and the table is not a complete runtime budget.
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Turn the model-load figure into a first-pass chip estimate
- Select the row and precision. Use the published approximate model-load estimate for the exact variant and quantization you intend to serve. Do not substitute an effective parameter count for the full model’s load requirement.
- Calculate the bare floor. Use
minimum_chips_by_load = ceil(published_load_memory_GB / 16_GB_per_chip). For example, the BF16 E4B estimate givesceil(17.9 / 16) = 2chips. This is only a nominal-HBM capacity screen. - Budget workload headroom. Leave room beyond the static load estimate for context/KV cache, compiler and serving buffers, and the intended batch or concurrent requests. The required reserve depends on the actual model implementation and workload; the published table does not specify a universal amount.
- Verify deployment topology. Google Cloud documents single-host serving configurations using one, four, or eight TPU v5e chips. For inference beyond eight chips, Google documents multi-host serving using Sax. A rounded-up memory floor does not establish that a desired chip count, sharding arrangement, or software implementation is supported.
- Test the complete stack. Benchmark the selected checkpoint, precision, framework, topology, and workload before treating the estimate as a production capacity plan.
The BF16 floors in the table are arithmetic illustrations, not deployment recommendations. In particular, a floor of five chips for 31B does not imply a supported five-chip single-host configuration. Google Cloud’s TPU v5e and Run inference on Cloud TPU documentation describe the relevant hardware and serving configurations. The TPU page also notes that v5e is supported through Google Kubernetes Engine and the Cloud TPU API; the API is no longer under active development and receives bug fixes and security updates. That API status is distinct from the documented serving configurations.
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Why memory needs grow with context and serving load
The model-load estimate is a starting point for static weights, not a promise that the remaining HBM will support a particular context length or number of requests. A long prompt and a long generated continuation both contribute to context use. Serving multiple requests or increasing batch size also changes the workload’s memory demand. The model card’s maximum context length describes what a variant accepts; it does not say that a full-length request will fit alongside the weights on a given chip count.
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- Estimate for the prompt and output lengths you expect to serve, rather than assuming every request uses the maximum context.
- Include the intended batch size or concurrent request count in capacity tests.
- For image or audio workloads, include the modality and preprocessing path in tests, since these add work beyond text-only prompts.
- Observe peak HBM use under the actual runtime, not just the weight-loading step.
What TPU v5e specifications do—and do not—say about speed
Google Cloud’s TPU v5e documentation lists these per-chip specifications:
| Specification | TPU v5e value | How to interpret it |
|---|---|---|
| HBM capacity | 16 GB per chip | Nominal memory used for the rough load-floor calculation; runtime and context memory also consume capacity. |
| HBM bandwidth | 800 GiB/s per chip | A hardware bandwidth specification, not an application-level token rate. |
| Peak compute | 197 TFLOPs BF16 per chip | A peak hardware figure, not achieved Gemma 4 inference throughput. |
| Bidirectional inter-chip interconnect bandwidth | 400 GB/s per chip | A hardware interconnect specification; it does not alone predict scaling or latency. |
Peak FLOPs cannot be converted directly into a reliable tokens-per-second claim. During one-token-at-a-time decoding, each generated token requires substantial work across model weights; at low batch sizes, moving weights through memory can be a limiting factor. At larger batches, matrix compute may matter more. Longer contexts increase attention and KV-cache work and memory pressure. These are workload-modeling considerations, not measured Gemma 4 results on v5e.
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Google Cloud’s 2023 engineering post, The world’s largest distributed LLM training job on TPU v5e, discusses training performance using observed TFLOPs per chip per second and model FLOPs utilization relative to peak. That methodology illustrates why peak and achieved compute differ, but training results are not Gemma 4 inference benchmarks. The official sources named here do not provide a reproducible tokens-per-second result for a specified Gemma 4 variant, v5e chip count, software stack, precision, prompt and output lengths, and batch or concurrency. No achieved rate should be inferred from the hardware peak.
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How to produce a useful throughput benchmark
Benchmark the workload you actually intend to serve, and report enough detail for another engineer to interpret or reproduce the result. Include:
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- Exact Gemma 4 checkpoint and variant.
- Precision or quantization, serving framework and version, and relevant compiler/runtime configuration.
- Number of v5e chips and whether the deployment is single-host or multi-host.
- Prompt length, generated output length, and whether requests include image or audio inputs.
- Batch size or concurrent request count.
- Warmup procedure and timed interval.
- Tokens per second per request and aggregate tokens per second, plus time to first token and inter-token latency.
- Peak HBM use during the run.
Measure prefill separately from decode if both matter to the application: a system may behave differently while processing a prompt than while generating tokens. Report the tested conditions alongside any rate; without them, a single tokens-per-second figure is not a meaningful capacity estimate.
How to compare candidate configurations
There is no universal winner established by the published load figures or hardware specifications. Compare candidates against the workload and deployment constraints that matter to you:
Quick Recap
- Variant and architecture: consider the model’s total parameters, modality needs, context limit, and—where applicable—effective versus full parameter counts.
- Precision and load footprint: compare the corresponding published load estimate, then confirm that the chosen implementation supports the precision or quantization.
- Context and concurrency: test the prompt/output lengths and request load you expect, with memory reserved for KV cache and runtime.
- Chip count and topology: check the desired configuration against documented single-host or multi-host serving options.
- Measured service behavior: compare peak HBM, latency, and throughput from benchmarks run with the same relevant conditions.
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