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ESP32 Deep Sleep Explained: What Stays On, What Wakes It, and What Resets

ESP32 deep sleep powers down the main application state. See what RTC memory retains, what can wake the chip and how to identify the wake cause.

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ESP32 deep sleep does not pause your program for later. It powers down the CPU cores, most RAM and APB-clocked digital peripherals; when a wake source triggers, the chip follows a boot path and starts the application again. RTC memory can preserve data across that wake, provided its power domain stays on. In practical terms, retained RTC state is not the same as a resumed task or stack.

What stays on during ESP32 deep sleep?

For the original ESP32, Espressif lists the RTC controller, ULP coprocessor, RTC FAST memory and RTC SLOW memory as the parts powered in deep sleep. The CPUs, most RAM, APB-clocked digital peripherals and wireless peripherals are powered off. Wi-Fi and Bluetooth connections therefore are not maintained through deep sleep. The chip can power down RTC domains that the selected wake sources do not need; power-domain configuration can change that behavior. See Espressif’s ESP32 Sleep Modes guide.

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RTC data can survive; ordinary application state cannot

Data deliberately placed in RTC memory can persist across deep-sleep wake while the corresponding RTC memory domain remains powered. Espressif places variables marked with RTC_DATA_ATTR in RTC SLOW memory by default and keeps that domain powered by default when such variables are used. Power-down configuration can override the default, so retention depends on the actual configuration.

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Ordinary variables in powered-off RAM should be treated as new application state after wake. Deep sleep does not preserve the task stack, CPU registers or an in-progress function call for the program to resume.

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Does the ESP32 resume where it left off?

No. A deep-sleep wake follows the boot path and starts firmware initialization again. The previous application execution is not resumed. If the application needs to continue a workflow, save the necessary state deliberately—typically in retained RTC memory for short-lived wake cycles, or in another suitable persistent store when retention across power loss is required.

What the wake stub changes

An optional wake stub can execute before normal initialization. It must reside in RTC FAST memory, and at that early stage it can call only ROM functions or code also available in RTC FAST memory. Espressif describes a partial initialization that validates RTC FAST memory before running the stub; most peripherals remain in reset and SPI flash has not yet been mapped. The stub is therefore for tightly constrained early work, not a way to keep the ordinary application running. Details are in Espressif’s Deep-sleep Wake Stub guide.

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What can wake an ESP32 from deep sleep?

The original ESP32 guide documents several wake routes. Wake sources can be combined, so the chip wakes when a configured source triggers. Configuration can remain active after wake and may need to be disabled if it should not affect a later sleep cycle.

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Wake source What triggers wake Practical considerations
RTC timer A configured elapsed time The API accepts microseconds, but actual timing resolution depends on the RTC slow-clock source.
Touch sensor A configured touch-pad interrupt Configure the touch pad before entering deep sleep.
ext0 One RTC GPIO reaches a selected logic level Keeps the RTC peripheral domain on. Set RTC GPIO pull-up or pull-down as needed. After wake, the pad is configured as RTC IO; call rtc_gpio_deinit() before using it as a digital GPIO.
ext1 Any selected RTC GPIO is high, or all selected pins are low, according to the configured mode Internal pulls require RTC peripheral power or suitable hold behavior; otherwise external resistors may be needed.
ULP coprocessor A condition detected by a program running from RTC SLOW memory Can monitor sensor, ADC or GPIO conditions while the main CPU sleeps, then wake it when the programmed event occurs.
Deep-sleep GPIO wake A supported GPIO powered by VDD3P3_RTC changes to the configured condition Supported pins are target-specific. Check the exact chip datasheet; do not assume all GPIOs or ESP32-family chips support the same mechanism.

These wake-source behaviors and configuration details are documented in Espressif’s ESP32 Sleep Modes guide. Pin availability varies by SoC and board, so verify the target datasheet before wiring a wake signal.

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Choosing a wake method

  • Use the RTC timer when the board should wake on a schedule rather than in response to an external event.
  • Use ext0 for one RTC GPIO and ext1 when the wake condition involves multiple RTC GPIOs.
  • Use the ULP when the condition needs to be checked while the main CPU remains asleep.
  • Use touch or deep-sleep GPIO wake only when the target chip supports the required feature and pins.
  • Account for the RTC domains and pulls each method needs; a wake source can affect which circuitry remains powered.

How do you tell what woke the ESP32?

Call esp_sleep_get_wakeup_cause() after wake to retrieve a wake-source cause. Espressif cautions that it reports only one source, so when multiple sources trigger at the same time, the cause information may not identify all of them. For ext1, use esp_sleep_get_ext1_wakeup_status() to identify the GPIOs that caused the wake; touch wake has its own status API. Consult the API guide for the relevant calls and configuration.

Deep sleep is different from light sleep

In light sleep, CPUs, digital peripherals and most RAM resume with their state preserved. Deep sleep instead powers down the CPU and most RAM, then restarts application initialization after wake. Choose light sleep when preserving execution state is important; choose deep sleep when the deeper power-down behavior fits and the firmware can rebuild its working state after every wake.

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Check the chip and board before wiring

ESP32-family products do not all share the same pin capabilities. The deep-sleep GPIO wake mechanism in the ESP32 guide applies only to pins powered by VDD3P3_RTC, and Espressif directs developers to the exact target datasheet for supported pins. Board layouts can expose only some SoC pins: for example, Espressif describes the ESP32-DevKitC as an ESP32 development board with most I/O brought to headers, not every possible pin guaranteed on every board. Confirm both the exact SoC and board pinout before connecting a wake circuit.

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