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CXMT Says Its G5 DRAM Platform Has Entered Mass Production

CXMT says its fifth-generation G5 DRAM platform has entered mass production, alongside two 24Gb LPDDR5X products. Production volumes, customer shipments and independent performance results were not disclosed.
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Chinese memory maker ChangXin Memory Technologies (CXMT) says its fifth-generation DRAM platform, G5, has entered mass production. Announced on September 20, 2026, at the World Manufacturing Convention in Hefei, the platform arrives with two 24Gb LPDDR5X chip configurations for smartphones and portable consumer electronics. The announcement details CXMT’s process measurements, but does not establish production volumes, independent performance results or customer shipments.

What CXMT announced about G5

CXMT describes G5 as its fifth-generation DRAM technology platform. At the convention, it also introduced two G5-based LPDDR5X products and said both are in mass production. DRAM is working memory that devices use to run apps and programs; LPDDR5X is a low-power DRAM type used in mobile and other compact devices.

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The process figures below are CXMT’s reported measurements and descriptions, not independently verified comparisons:

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  • 11.95 nm active-area half-pitch: CXMT says it achieved this memory-array dimension using self-aligned quadruple patterning (SAQP).
  • 45:1 array-capacitor aspect ratio: a ratio describing capacitor geometry in the memory array.
  • 6,762 nm core-cell-array height: CXMT attributes this figure to a DRAM-optimized high-k metal gate process.

These figures describe particular structures and process techniques. The 11.95 nm half-pitch should not be treated as a standardized “12nm node” label: the announcement provides no like-for-like comparison that would establish equivalence to another manufacturer’s process node. CXMT also cites interface engineering, saddle-fin structures, low-k spacer bitlines and a digital-twin R&D platform spanning design, tape-out, manufacturing and yield maintenance; these, too, are company descriptions.

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What the 50% die-per-wafer claim means

CXMT says G5 produces at least 50% more gross dies per wafer than its fourth-generation platform, with the comparison normalized to an 8Gb density baseline. Gross dies per wafer (DPW) count the dies on a wafer before defective dies are excluded. The figure is therefore not a claim that the number of usable chips or final-test yield rises by 50%. CXMT did not disclose the passing share, manufacturing volume or realized output. Reuters reporting republished by The Business Times also distinguishes gross dies from units remaining after defective dies are removed.

The two announced G5 LPDDR5X products

Both products have a capacity of 24Gb per die. CXMT identifies their package formats and intended device category, but does not report performance differences between them.

Product Capacity per die Package format Intended use stated by CXMT
G5 LPDDR5X 24Gb 496-ball Smartphones and portable consumer electronics
G5 LPDDR5X 24Gb 245-ball Smartphones and portable consumer electronics

These are packaged components for device makers, not consumer upgrade modules. CXMT did not name handset customers or retail products, and the announcement provides no consumer purchase channel or compatibility list.

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What mass production does—and does not—establish

“Mass production” is CXMT’s stated manufacturing status for G5 and the two announced LPDDR5X products. The announcement does not quantify how many wafers or chips are being produced, how much capacity will come online, or whether customers have received shipments. It also contains no independent benchmark results establishing G5’s performance or competitiveness against other manufacturers.

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At the event, CXMT vice-president and marketing centre head Luo Xiaodong said: “Our process capability is now on par with the most advanced mass-produced nodes out there in the industry.” That is CXMT’s characterization, not an independently established ranking. The announcement’s physical measurements do not by themselves provide the like-for-like competitor data needed to confirm it.

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How G5 fits CXMT’s memory business

CXMT says it was founded in 2016 and designs and manufactures DRAM for phones, PCs, tablets, servers and other applications. It competes with established DRAM suppliers Samsung Electronics, SK Hynix and Micron Technology. Reuters, republished by The Business Times, frames the G5 announcement as an effort to strengthen a Chinese competitor and add supply, but the available figures do not show how much supply G5 will add or quantify any effect on memory prices.

CXMT’s separate October 28, 2025 LPDDR5X portfolio announcement lists dies, packaged chips and LPCAMM modules, along with data-rate and production-status information. It does not say those earlier products use G5, so they should not be treated as G5 specifications or evidence of G5 retail availability. CXMT’s 2025 portfolio announcement

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Product prices and availability are accurate as of the date/time indicated and are subject to change. Any price and availability information displayed on Amazon at the time of purchase will apply.

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