Nvidia RTX Spark uses a unified memory architecture (UMA): its Arm CPU and Blackwell integrated GPU share one coherent pool of LPDDR memory instead of having separate system RAM and GPU VRAM. That arrangement can let larger AI models remain in memory and can eliminate many explicit CPU-to-GPU copy operations. It does not, however, make the memory as fast as high-bandwidth VRAM on a discrete graphics card. CPU and GPU still compete for the same roughly 273–300 GB/s memory system, so sustained performance depends on bandwidth, memory placement, workload shape and software support.
The practical result is a platform optimized first for fitting large models and simplifying CPU/GPU data sharing, not a guarantee of higher raw throughput in every task.
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What unified memory means on RTX Spark
NVIDIA describes RTX Spark as an Arm-based system-on-chip that combines a Grace-family CPU with a Blackwell integrated GPU (iGPU). Both processors use the same physical LPDDR memory. The platform maintains coherence for memory that is accessible to more than one processor, so the CPU and GPU can work from shared data without maintaining unrelated copies in separate RAM and VRAM pools.
That is different from a conventional desktop with a discrete GPU. In a discrete-GPU PC, the CPU normally allocates system RAM while the graphics card owns a separate VRAM pool. Moving data between them requires transfers across the system interconnect, and applications often stage or duplicate buffers. RTX Spark places the processors and memory in one SoC design, changing both the capacity calculation and the cost of data movement.
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One physical pool, three logical regions
Windows presents the physical pool through three logical categories:
- Dedicated GPU memory (carveout): a reserved portion for the iGPU. Windows reports it as dedicated GPU memory, even though the physical storage is system LPDDR rather than separate VRAM chips.
- Shared system memory: memory that Windows manages and that both the CPU and iGPU can access.
- CPU-only system memory: the remaining capacity that is not available for GPU allocations.
The labels describe access and reservation policy, not three different kinds of memory hardware. A carveout gives the GPU a guaranteed region; shared memory provides common allocations; CPU-only memory protects capacity for operating-system and CPU workloads.
How the shared-memory amount is determined
NVIDIA’s Windows-on-Arm porting documentation states that, after the GPU carveout, the nominal shared-memory size is the post-carveout capacity minus 16 GB, constrained to between 50% and 80% of that post-carveout capacity. CPU-only memory receives the balance. The formula is therefore a policy for dividing the remaining pool, not a promise that every application can use the entire physical total as GPU memory at once. Drivers, the operating system and application allocations still determine what is available at a given moment.
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NVIDIA has published slightly different bandwidth figures in different 2026 materials. One platform specification lists up to 128 GB of LPDDR5, a 256-bit interface and 300 GB/s of bandwidth. The DGX Spark User Guide lists 128 GB of LPDDR5x on the same 256-bit interface at 273 GB/s. Treat these as source- and configuration-specific published figures rather than combining them into a single guaranteed rate.
| Specification | Published detail | Qualification |
|---|---|---|
| Unified memory capacity | Up to 128 GB | CPU and iGPU share the pool; the usable GPU, shared and CPU-only portions depend on the carveout and operating-system policy. |
| Memory interface | 256-bit | Described in NVIDIA’s 2026 platform specifications. |
| Memory bandwidth | 273 GB/s or up to 300 GB/s | 273 GB/s appears in the 2026 DGX Spark User Guide; up to 300 GB/s appears in another 2026 NVIDIA specification. |
| CPU | 20 Arm cores | 10 Cortex-X925 cores plus 10 Cortex-A725 cores. |
| GPU | 6,144 CUDA cores | Blackwell integrated GPU. |
| AI performance | Up to 1 PFLOP FP4 with sparsity | NVIDIA figure from the DGX Spark User Guide; it is a peak specification, not an application benchmark. |
The bandwidth number is system bandwidth shared by CPU and GPU. It is not a dedicated 273–300 GB/s channel reserved exclusively for graphics or CUDA workloads.
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Where unified memory improves performance
Larger models can fit in one address space
The clearest advantage is capacity. A model’s weights, activations, runtime workspace and CPU-side data can occupy one large pool rather than being constrained by the capacity of a small discrete GPU’s VRAM. NVIDIA positions DGX Spark for inference on models of up to 200 billion parameters and local fine-tuning of models up to 70 billion parameters.
Those figures describe the classes of workloads NVIDIA intends the platform to support; they are not a promise that every 200-billion-parameter model will run at a useful token rate. Quantization, context length, batch size, optimizer state, activation memory and framework overhead all affect the amount of memory a particular job needs. A model that fits can still be limited by bandwidth or by software support.
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Fewer explicit copies between processors
With separate RAM and VRAM, a preprocessing stage may have to copy a buffer to the GPU before a kernel can consume it, then copy results back for CPU work. Coherent shared allocations can let CPU preprocessing and GPU execution operate on the same buffers. That can remove staging copies, reduce duplication and lower synchronization overhead when an application is designed for UMA.
There is no fixed percentage speedup associated with this feature. The benefit depends on how often the workload exchanges data, whether the framework uses shared allocations efficiently and whether the data is reused enough to justify keeping it resident.
More compact systems
Integrating CPU, GPU and memory in one package enables a compact desktop-class AI system. NVIDIA describes DGX Spark as a compact desktop AI computer. Fewer separate components can simplify cooling and physical design compared with a multi-card workstation, although compactness also limits expansion options compared with a conventional add-in GPU platform.
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Where UMA can limit throughput
CPU and GPU contend for the same bandwidth
Every CPU read, GPU tensor operation, operating-system activity and data transfer draws from the shared LPDDR interface. Streaming kernels, large-batch inference and simultaneous CPU preprocessing can approach the platform’s bandwidth ceiling. When that happens, avoiding a copy does not create additional bandwidth; it simply changes how the existing bandwidth is used.
A discrete GPU may have much faster dedicated VRAM for bandwidth-bound work, even if its total capacity is lower. RTX Spark’s advantage is often that a model fits at all, not that each memory access completes faster.
Unified addressing does not remove placement rules
CPU-only pages cannot satisfy GPU allocations, while carveout memory is reserved for the iGPU. If an application places data in an unsuitable region, the driver may need to migrate or page it, adding latency. A single address space therefore does not mean every byte has identical access characteristics. Frameworks and allocators still need to place hot GPU data appropriately and avoid unnecessary paging.
Capacity and throughput are different measurements
Having 128 GB available can prevent an out-of-memory failure, but it does not determine token-generation speed, image-processing rate or kernel execution time by itself. Bandwidth, arithmetic intensity, batch size, memory locality and CPU activity remain decisive. NVIDIA’s cited specifications do not provide an independent, workload-by-workload benchmark suite establishing a universal RTX Spark advantage or disadvantage against discrete GPUs.
Software support is part of the performance equation
RTX Spark runs an Arm CPU and Windows on Arm. Applications need native ARM64 support or a compatible execution path, along with CUDA and framework versions that recognize the integrated GPU and its memory model. NVIDIA publishes a Windows-on-Arm porting guide because assumptions made by x86 applications built around discrete VRAM—such as fixed device-memory limits or mandatory host-to-device copies—may require changes.
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Can RTX Spark run large AI models locally?
Yes, its large coherent pool is specifically intended to make local operation of very large models practical. NVIDIA cites inference models up to 200B parameters and fine-tuning up to 70B parameters for DGX Spark. Whether a particular model works depends on its numerical format and runtime footprint:
- Inference: weights must fit alongside the context, activations, KV cache and runtime buffers. Longer context windows and larger batches consume more memory.
- Fine-tuning: gradients, optimizer state and checkpointing can require substantially more memory than inference, which is why NVIDIA’s cited fine-tuning ceiling is lower than its inference figure.
- Performance: a model can fit yet generate tokens slowly if its workload repeatedly streams data through the shared LPDDR system.
- Software: the model server, CUDA libraries and Arm64 build must correctly handle unified allocations and the integrated GPU.
The memory architecture removes a hard small-VRAM barrier; it does not turn a 128-GB pool into the equivalent of 128 GB of high-speed discrete VRAM.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.RTX Spark versus a conventional discrete-GPU PC
The meaningful comparison is multidimensional. Memory capacity alone can produce the wrong buying or deployment decision.
| Comparison axis | RTX Spark UMA | Conventional discrete GPU |
|---|---|---|
| Capacity | Up to 128 GB in one CPU-GPU coherent pool, divided into carveout, shared and CPU-only regions. | GPU work is constrained primarily by the card’s dedicated VRAM; system RAM remains separate. |
| Bandwidth | 273–300 GB/s published system bandwidth shared by CPU and iGPU. | Dedicated VRAM bandwidth varies by card; no comparative value is established in the cited material. |
| Transfer overhead | Shared coherent buffers can reduce explicit staging and duplication. | Host-to-device and device-to-host transfers commonly cross the system interconnect and may require copies. |
| Best fit | Capacity-bound models, compact local AI systems and CPU/GPU pipelines that exchange buffers frequently. | Bandwidth-bound inference, graphics or compute workloads that benefit from very fast dedicated VRAM and multiple cards. |
| Software | Requires ARM64/Windows-on-Arm readiness and correct UMA placement behavior. | Typically targets mature x86 and discrete-GPU software paths, subject to the card and framework. |
| Form factor | Integrated SoC and compact system design. | Add-in-card expansion, with more flexibility for upgrades and cooling. |
How to evaluate a real workload
- Measure the memory footprint first. Include weights, activations, context or KV cache, optimizer state and framework overhead. Check whether the job fits after the GPU carveout and operating-system reservations, not merely against the advertised 128 GB.
- Identify the bottleneck. If the workload fails because the model cannot fit in VRAM, UMA capacity may solve the immediate problem. If it already fits and is bandwidth-bound, a discrete GPU with faster VRAM may remain faster.
- Keep CPU preprocessing deliberate. Shared buffers reduce copies, but concurrent CPU streaming can steal bandwidth from GPU kernels. Schedule preprocessing so it does not saturate the memory system during latency-sensitive GPU work.
- Use Arm64-native software where available. Verify the model runtime, CUDA stack, Python packages and extensions. Emulation or an x86-only binary can erase the efficiency benefits of the SoC.
- Profile placement and paging. Watch for allocations landing in CPU-only memory, migration events or a working set larger than the practical shared region. Correct placement is more important than the fact that addresses appear unified.
- Benchmark the complete pipeline. Record model-load time, first-token latency, sustained tokens per second, batch throughput and CPU utilization. A kernel-only result will not show contention from preprocessing, data loading or the operating system.
Common symptoms and what they indicate
| Symptom | Likely explanation | Useful response |
|---|---|---|
| The model loads but generation is slow. | The workload is bandwidth-bound or repeatedly moving data through shared LPDDR. | Reduce batch or context size, improve data reuse and profile memory throughput before adding more capacity. |
| GPU memory appears available, but an allocation fails. | The request may exceed the carveout or shared region, or the pages are classified as CPU-only. | Inspect the driver’s memory categories and allocation policy; do not treat total physical RAM as guaranteed GPU capacity. |
| CPU preprocessing makes GPU latency worse. | Both processors are contending for the same memory bandwidth. | Throttle, batch or overlap preprocessing only where profiling shows that overlap helps. |
| A familiar package runs much slower or will not install. | The application or extension lacks a suitable ARM64/Windows-on-Arm build. | Use a native build or a supported port, and verify CUDA/framework compatibility. |
The practical verdict
RTX Spark’s UMA is primarily a capacity and data-movement design. A coherent 128-GB-class pool can keep models resident that would exceed a smaller discrete card’s VRAM, while shared buffers can simplify CPU/GPU pipelines and reduce explicit copies. The trade-off is that CPU and GPU share the same LPDDR bandwidth, so streaming-heavy and highly concurrent workloads can become memory-bound.
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Random freezes, missing sound and display glitches usually trace back to one bad driver. Find and replace yours safely.Free scan · under a minuteChoose or evaluate RTX Spark by asking whether your workload is limited by fitting the model, moving data between processors, or executing bandwidth-heavy kernels. For the first two cases, unified memory can be a major practical advantage. For the third, a discrete GPU with faster dedicated VRAM may deliver higher throughput even with less total memory. NVIDIA’s published architecture and specifications establish these trade-offs; only a benchmark using your model, context, batch size and software stack can determine the final performance.
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