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Repair common Windows errors and clear accumulated junk for a smoother, more stable PC - no reinstall needed.Free scan · no reinstallASML High-NA EUV is a semiconductor lithography platform that uses 0.55 numerical aperture (NA) optics to pattern smaller features with 13.5 nm extreme-ultraviolet light. Its first systems belong to the TWINSCAN EXE family. As of October 7, 2026, Intel and ASML say the technology is in high-volume manufacturing on selected layers for a subset of Intel Core Ultra Series 3 processors.
What does “High-NA EUV” mean?
“EUV” stands for extreme-ultraviolet, the type of light used to project circuit patterns onto silicon wafers. “NA” means numerical aperture: a measure of how effectively an optical system collects and focuses light. ASML’s High-NA EXE platform has an NA of 0.55, compared with 0.33 for its earlier NXE EUV systems. Both use a 13.5 nm wavelength.
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High-NA EUV is therefore an optical advance, not a new wavelength. Raising the NA improves the system’s ability to resolve smaller patterns without changing the EUV light source’s wavelength. The platform is designed for advanced logic and memory manufacturing, where smaller and denser patterns can be important.
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How does it differ from earlier EUV lithography?
| Characteristic | ASML NXE EUV | ASML EXE High-NA EUV |
|---|---|---|
| Numerical aperture | 0.33, according to ASML and imec | 0.55, according to ASML and imec |
| Light wavelength | 13.5 nm, according to ASML | 13.5 nm, according to ASML |
| Resolution figure | Not stated in the cited ASML product information | 8 nm system resolution for the EXE:5000, according to ASML |
| Projection design and field | Conventional EUV projection design; larger exposure field than EXE | Anamorphic optics demagnify the mask image 4× in one direction and 8× in the other; exposure field is half the NXE field, according to ASML |
| Mask and stage implications | Baseline EUV reticle and stage approach | ASML says anamorphic optics allow traditionally sized reticles; faster wafer and reticle stages accommodate the smaller exposure field |
ASML says the EXE:5000’s 8 nm resolution enables single-exposure printing of features 1.7 times smaller and transistor density 2.9 times higher than possible with NXE systems. Those are ASML’s platform comparisons, not a guarantee that every chip design will achieve those gains.
What does the 8 nm resolution figure tell you?
The 8 nm figure is the EXE:5000 optical system’s stated resolution, not a claim that every finished transistor or circuit feature measures 8 nm. A printed pattern depends on the full manufacturing process, including the resist and underlayers, mask, etch steps and how the process is integrated for a particular layer.
It is also important to distinguish resolution from pitch. Pitch is the repeat distance between equivalent points in neighboring features, such as adjacent lines. Imec reported several process-specific demonstrations using High-NA EUV:
- In 2024, imec demonstrated single-print line-and-space images at 16 nm pitch using an EXE:5000 and optimized metal-oxide resist. It also reported contact holes and pillars at 24 nm pitch.
- In a later report, imec described metallized line structures at 20 nm pitch in 2025, and ruthenium lines at 18 nm and 20 nm pitch using direct metal etch.
These are demonstrations under particular process conditions; they are not interchangeable with ASML’s nominal system-resolution specification. Similarly, “2 nm” and “sub-2 nm” refer to semiconductor process-node labels, not a literal measurement of every transistor feature.
Why are chipmakers investing in High-NA EUV?
The main manufacturing rationale is to print very small patterns with fewer separate patterning steps. With lower-NA lithography, a chipmaker may need to split a dense pattern across multiple exposures and process steps—a practice known as multiple patterning. High-NA is intended to let some layers be patterned in a single exposure instead of double or triple patterning.
Reducing steps on a suitable layer can simplify process integration and may reduce cycle time, opportunities for defects and demand on fab space. These are potential or reported platform advantages, not automatic outcomes for every layer or product. Whether High-NA makes sense depends on the pattern, materials, process integration and manufacturing economics.
ASML positions EXE for advanced logic beginning at the 2 nm node and for memory at similar transistor density. Imec describes its EXE:5200 research platform as supporting development of sub-2 nm logic and high-density memory. Those descriptions concern intended process generations and development work; they do not mean the node label is a physical feature-size specification.
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Where is High-NA EUV being used now?
The deployment picture has moved beyond research demonstrations, but it remains limited to specific layers and products. On July 15, 2026, ASML reported that Intel Foundry had entered high-volume manufacturing for a subset of Panther Lake processors on Intel 18A, using High-NA EUV on selected layers. ASML said those layers were dual-qualified and that product shipped at yields matched to NXE.
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Outbyte PC Repair FREERepair Windows errors before they cause bigger problemsFix Now →Outbyte Driver Updater FREEScan for outdated or missing drivers - takes under a minuteDriver Scan →On September 7, 2026, Intel and ASML reported that more than one million wafers had been processed across early tool certification and testing, research and development, and volume production on selected layers for that Panther Lake subset. The million-plus total covers all those activities; it should not be read as a count of commercial production wafers. Intel said overlay, throughput and availability were meeting its expectations.
That is evidence of selected-layer production use, not broad adoption across all Intel products or the semiconductor industry. ASML’s 2025 annual report said the EXE platform was expected to start supporting high-volume manufacturing in 2027. That platform-wide roadmap statement predates the July and September 2026 reports of limited selected-layer production at Intel; the reports describe different stages and scopes of deployment.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.How do EXE:5000 and EXE:5200 fit into the platform?
The EXE:5000 is ASML’s first High-NA system. The EXE:5200 family advances the platform, while research-facility installation and qualification should be distinguished from commercial production use.
| System or milestone | What is established |
|---|---|
| EXE:5000 | ASML specifies 8 nm system resolution. Imec used an EXE:5000 for the cited patterning demonstrations. |
| EXE:5200B | ASML’s 2025 annual report says it shipped the first EXE:5200B in early April 2025, ready for high-volume manufacturing use. ASML reports 175 wafers per hour and 60% higher productivity than EXE:5000, attributing the increase to an improved EUV light source. |
| EXE:5200 at imec | Imec announced on March 18, 2026 that the system had arrived in its 300 mm cleanroom in Leuven. At that time, imec anticipated full qualification by Q4 2026; that March expectation is not confirmation that qualification was completed. |
The reported 175 wafers per hour and 60% productivity improvement apply to ASML’s EXE:5200B comparison. They do not establish a universal production rate for every EXE configuration or fab condition.
Quick Recap
What should readers take away from the specifications?
- High-NA changes the optics: EXE raises NA from 0.33 to 0.55 while retaining the 13.5 nm EUV wavelength.
- System resolution, printed feature size, pitch and process-node labels describe different things; none should be substituted for another.
- Single-exposure patterning can reduce process steps on suitable layers, but the result depends on the specific chip process.
- By October 2026, Intel and ASML report selected-layer High-NA use in high-volume manufacturing for a subset of Panther Lake processors. That does not establish industry-wide or product-wide deployment.
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