Terafab is a proposed Tesla-and-SpaceX semiconductor operation, not a finished mega-fab. Company materials describe one integrated site for chip design, lithography-mask design, logic and memory fabrication, advanced packaging, and fast test-and-iterate cycles. The project’s headline figure—1 terawatt of compute hardware per year—is a long-term ambition expressed in compute or power terms, not today’s chip output, wafer starts, or a count of processors.
In the near term, Tesla has described a much smaller research fab at its Giga Texas campus. Elon Musk said that facility could cost “probably a $3 billion-ish” and process “a few thousand wafers per month.” SpaceX, according to Musk’s account, would handle the first scaled-up phase of Terafab, while later responsibilities remain unsettled. Intel has joined the effort, with Intel’s 14A process named as the target, but the companies have not disclosed the commercial and manufacturing terms.
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What Terafab is supposed to be
Terafab is best understood as a plan to bring more of the semiconductor process inside the Tesla and SpaceX orbit. The official Terafab site describes a factory that combines three major production layers under one roof:
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- Memory: memory components needed to feed those processors.
- Advanced packaging: the assembly and interconnection techniques that join dies, memory and other components into a usable package.
SpaceX’s SEC filing expands that scope to include chip design, lithography-mask design, fabrication of logic and memory, advanced packaging, and rapid test-and-iterate loops. In a conventional supply chain, those activities can be divided among design houses, mask suppliers, wafer foundries, packaging specialists and test providers. Terafab’s proposed advantage is coordinating them more tightly for Tesla and SpaceX workloads.
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The rationale stated by the companies is also specific: reduce exposure to future chip shortages, tune hardware for their own systems, and potentially lower costs. Those are objectives and expectations, not results that Terafab has already demonstrated.
What the 1-terawatt target actually means
Terafab’s site presents “Terafab output 1 TW/Year” and compares it with “Current annual U.S. consumption .5 TW.” SpaceX’s filing describes one terawatt per year as a long-term goal for compute hardware. The wording matters because a terawatt is a power unit, not a semiconductor production unit.
The figure therefore does not tell you how many chips the facility will make. Chip counts vary with die size, performance, power consumption and the type of system into which each chip is installed. Nor does 1 TW/year establish a current wafer-start rate, installed factory capacity or achieved output. It is a company capacity ambition stated in terms of the compute hardware’s aggregate power or computing scale.
The only near-term volume figure publicly attributed to Musk is for Tesla’s proposed research fab: a few thousand wafers per month. That pilot-scale description should not be converted into a claim that the eventual Terafab will produce a fixed number of wafers or that it is already operating at that rate.
How the proposed operation would be organized
A captive manufacturing capability, not a disclosed merchant foundry
The project is framed around Tesla’s vehicles and Optimus robots, plus SpaceX’s space systems and orbital computing ambitions. The available company materials do not announce an open foundry service for unrelated chip designers. A captive fab could prioritize internal road maps, change designs quickly and reserve capacity for a parent company’s products, but it would also have to carry the cost and operational risk of running an advanced semiconductor facility.
Integration from masks through packaging
Chip design and lithography-mask design determine how a circuit is printed on wafers. Fabrication turns those designs into silicon dies. Packaging then connects dies, memory and interfaces while managing power delivery, heat and signal integrity. Keeping those steps connected could shorten feedback loops: a design problem found in testing might be traced to a mask, process step or package and corrected without waiting for several independent suppliers to coordinate.
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That integration is the theory behind the project. The public materials do not provide measured cycle-time improvements, yield data or a completed product demonstrating that the approach works at scale.
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Where the project stands
Tesla’s research fab at Giga Texas
On Tesla’s FY2026 Q1 earnings call, Musk said Tesla would build a research fab on its Giga Texas campus. He estimated the initiative at “probably a $3 billion-ish” and said it would be capable of “a few thousand wafers per month.” He described the facility as a place to test ideas and determine whether processes work under production-like conditions.
This research fab is materially different from a plant delivering the 1 TW/year ambition. A pilot or research line can validate process recipes, packaging choices and design flows at limited volume. It does not, by itself, establish the financing, construction progress, equipment installation or economics of a much larger production site.
The scaled-up Terafab phase
Musk said SpaceX would take care of the initial phase of scaled-up Terafab and that the rest was still to be determined. His public description leaves open questions about governance, ownership, site selection, construction sequencing and which organization would operate each production area.
As of an October 7, 2026 report by Tom’s Hardware, Intel CEO Lip-Bu Tan had reaffirmed Intel’s participation. Musk was also reported to have said Terafab would build and operate its own fab, while suggesting that TSMC might sublease part of it. That TSMC idea is a proposal, not a completed agreement, and the report said the details of Intel’s arrangement remained unknown.
Intel’s role and the 14A process target
Musk said on Tesla’s earnings call: “We plan to use Intel’s 14A process, which is state-of-the-art and in fact, not yet totally complete.” He added: “By the time TeraFab scales up, 14A will be probably fairly mature or ready for prime time.” These are Musk’s statements about the intended process, not confirmation that Terafab is currently manufacturing on 14A.
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SpaceX’s filing says Intel joined in early April 2026 and highlights Intel’s ability to design, fabricate and package high-performance chips. The sources do not disclose whether Intel’s participation involves licensing, engineering support, equipment, process transfer, supply commitments or another structure. They also do not state the value or duration of any agreement.
Choosing a named process node does not resolve the practical questions of readiness. A production decision would still depend on design rules, process qualification, equipment availability, mask release, packaging compatibility, yield learning and the ability to repeat the process reliably. The public record does not establish those milestones for Terafab.
What chips Terafab is intended to make
The project’s stated chip families and use cases point to specialized internal hardware rather than a general-purpose catalog for outside buyers.
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| Hardware or workload | Stated connection to Terafab | What is established |
|---|---|---|
| AI5 | Full Self-Driving (FSD) and Tesla Optimus | The Terafab site associates the designation with those systems. |
| AI6 | Tesla Optimus | The Terafab site associates the designation with Optimus. |
| D3 | Space applications | The Terafab site associates the designation with space use. |
| Terrestrial edge chips | Inference and control in vehicles and robots | SpaceX describes this as a broad target category, primarily for Tesla vehicles and Optimus. |
| Space-environment chips | Orbital compute infrastructure | SpaceX describes a separate category optimized for operation in space. |
“Edge” in this context means processing data near the device—inside a vehicle or robot—rather than sending every workload to a distant data center. Space hardware adds different constraints, including operation in an orbital environment. The filing presents these as design targets; it does not publish final specifications, performance numbers or qualification results for the chips.
What Terafab could change in chip manufacturing
Shorter design-to-hardware feedback loops
If design, masks, wafer processing, packaging and testing are managed as one program, Tesla and SpaceX could iterate on workload-specific hardware with fewer handoffs. That could matter for robotics and vehicles, where software updates and model requirements may change the balance between compute, memory bandwidth, power and heat. The potential benefit follows from the proposed integration; no public result proves a faster loop yet.
More control over selected capacity
Owning or directing part of the manufacturing chain could give the companies a reserved source for strategic chips when commercial foundries are full or when a product needs unusual packaging. It could also let them choose which internal designs receive priority. The trade-off is that an advanced fab requires large capital spending, specialized staff, steady utilization and years of process learning.
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Logic, memory and packaging as one system problem
AI hardware performance is not determined by the logic die alone. Memory access, package connections, thermal limits and power delivery can constrain a system even when the processor itself is fast. A facility designed around all three—logic, memory and advanced packaging—could optimize the complete module for a vehicle, robot or spacecraft instead of optimizing each component in isolation.
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Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.Why Terafab will not eliminate outside suppliers
SpaceX’s filing says it expects to continue sourcing a significant portion of its compute hardware from third parties. Terafab is therefore better viewed as additional internal capacity and control for selected workloads, alongside external procurement.
This mixed model can be practical. Internal production can focus on chips where customization, security of supply or rapid iteration matters most, while outside suppliers provide mature components, additional volume or technologies that the internal operation does not yet support. It also reduces the risk of treating the 1 TW/year aspiration as a promise that every Tesla or SpaceX processor will come from one facility.
When will Terafab start producing chips?
No production start date is established in the cited materials. Tesla has described a planned research fab, and Musk has discussed a future scaled-up phase, but the public statements do not provide a construction-completion date, initial production date or wafer capacity for the scaled fab.
Intel’s participation and the 14A target indicate a direction, not a verified manufacturing schedule. A credible start date would normally require disclosed milestones such as facility completion, tool installation, process qualification, mask release and pilot yields. None of those milestones is publicly established here.
What remains unknown
Readers should separate the project’s stated intentions from facts that have not been disclosed. The available materials do not establish:
- Final financing, ownership or governance.
- A completed construction schedule or operating site for the scaled fab.
- Production capacity, yields or utilization for the scaled operation.
- Terms of Intel’s participation, including licensing or hands-on manufacturing support.
- A signed agreement for any TSMC sublease.
- Customer commitments from companies outside the Tesla and SpaceX family.
- Measured cost savings, performance gains or shortage reductions.
- An independent benchmark or third-party validation of the 1 TW/year capacity ambition.
Those gaps are consequential. Semiconductor projects often take years to move from an announced process target to repeatable, high-yield production, and a headline capacity number cannot substitute for evidence of functioning tools, qualified designs and shipping products.
How to evaluate future Terafab announcements
Five questions provide a useful test for later claims:
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- What part of the chain is operational? Look for evidence covering design, masks, wafer fabrication, packaging and test rather than a general statement that the factory exists.
- Is the number a pilot rate or a long-term goal? Keep the “few thousand wafers per month” research-fab estimate separate from the 1 TW/year compute ambition.
- Which process and maturity level are demonstrated? A reference to Intel 14A is not the same as disclosed qualification, yield or volume production.
- Who is the hardware for? Internal Tesla and SpaceX programs, a partner’s chips and an open merchant-foundry service would have very different business implications.
- What evidence supports the economics? Claims of lower costs or better performance need disclosed volumes, yields, package specifications and comparable measurements.
The practical significance for AI hardware
Terafab matters because AI systems increasingly depend on tightly matched combinations of compute, memory, packaging and software. Tesla’s vehicles and robots need efficient inference at the edge, while SpaceX is discussing chips designed for space-based computing. A vertically coordinated supply chain could let those companies tailor hardware to those constraints and add a measure of supply resilience.
But the project is still a plan with a pilot-scale research component and a much larger long-term aspiration. Intel’s involvement and the proposed 14A target make the manufacturing strategy more concrete, while the undisclosed contracts, schedule, capacity, yields and results leave its eventual impact uncertain. The defensible conclusion today is not that Terafab has transformed chip manufacturing, but that Tesla and SpaceX are attempting to add an internally controlled semiconductor capability without abandoning substantial external sourcing.
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