The Tool Desk
Outbyte PC Repair FREEClear out junk files and repair common Windows errorsFree Scan →Outbyte Driver Updater FREEScan for outdated or missing drivers - takes under a minuteDriver Scan →Data centres need a coordinated semiconductor system, not just AI accelerators. CPUs, high-bandwidth memory (HBM), server DRAM, NAND-based SSDs, switching and interconnect silicon, optical components, and power-management devices all determine whether a deployment delivers useful work reliably. The right mix depends on workload and architecture: a distributed training cluster stresses accelerator memory bandwidth and scale-out links, while general cloud and storage services also depend heavily on CPU capacity, conventional DRAM, persistent storage and network throughput.
The semiconductor stack behind a data centre
Every server is a chain of dependencies. Accelerators perform parallel workloads, but CPUs coordinate operating systems, virtual machines, storage services and control-plane tasks. Memory keeps active data close to those processors. Storage retains data when power is removed. Network and optical silicon moves information between chips, servers, racks and sites. Power semiconductors convert and regulate electricity so each rail stays within the limits required by processors and memory.
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That means a supplier conversation should begin with the system’s bottlenecks rather than with a single chip specification. A component that looks excellent in isolation can be unsuitable if its interface, firmware, thermal envelope, package, qualification status or delivery schedule does not match the rest of the platform.
| Layer | What it does | What suppliers must support |
|---|---|---|
| CPUs | Runs general-purpose code, orchestration, virtualisation and input/output control | Core capacity, memory channels, platform compatibility, security features and long lifecycle support |
| HBM | Provides very high bandwidth beside an accelerator package | Bandwidth, capacity, package integration, thermal behaviour and reliable supply |
| Server DRAM | Holds operating-system, application and virtual-machine working sets | DDR5 or another qualified type, error correction, capacity per socket, speed and module compatibility |
| NAND SSDs | Stores data persistently for boot, datasets, databases, checkpoints and caches | Endurance, capacity, latency, controller behaviour, power-loss protection and fleet telemetry |
| Networking and interconnect | Connects processors, memory, storage, servers and racks | Ethernet, PCIe, CXL or other required interfaces, switching capacity, latency and interoperability |
| Optical silicon | Converts electrical data to optical signals for high-speed links | Optical engines, photonic integrated circuits, digital signal processing, reach, thermal control and serviceability |
| Power semiconductors | Converts, regulates, protects and monitors energy at board and server levels | Voltage regulators, power-management ICs, controllers, telemetry and suitable GaN or SiC devices |
This is a component map, not a universal bill of materials. A two-socket virtualisation host, a storage-heavy service and a multi-rack training pod can have radically different ratios of these parts.
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Why memory requirements extend beyond HBM
HBM for accelerator-adjacent bandwidth
HBM sits close to an accelerator and feeds it with far more bandwidth than ordinary server memory can provide. That makes it central to many training and inference designs, where repeatedly moving model weights, activations and gradients is a limiting factor. Suppliers must deliver not only the memory stacks but also the advanced packaging, interposer or substrate arrangements, thermal solution and validated signalling needed to connect them to the accelerator.
HBM capacity is not the same as system-memory capacity. A workload can have enough accelerator bandwidth yet still be constrained by the amount of data that fits in HBM, requiring transfers to host memory or storage. Those transfers add latency and consume interconnect bandwidth, so capacity, bandwidth and placement have to be evaluated together.
DDR5 and other server DRAM for the host
Server DRAM, including DDR5 RDIMMs and other qualified modules, supports the operating system, hypervisor, databases, data-preparation pipelines and application state. It is volatile working memory, not a substitute for HBM or an SSD. Capacity per socket, number of memory channels, error-correction behaviour, supported speeds and population rules all affect the usable result.
Micron’s 2026 Form 10-K describes HBM, high-capacity DIMMs, low-power server DRAM and DDR5 RDIMMs within its data-centre-related portfolio. Those descriptions are the company’s disclosures, not a neutral ranking of memory suppliers. For a deployment, the server manufacturer’s qualified-vendor list and platform memory rules take precedence over a module’s headline speed.
NAND-based SSDs for persistence
Data-centre SSDs use NAND flash to retain operating systems, databases, user objects, training datasets, checkpoints and temporary caches after shutdown. Their relevant measures include usable capacity, read and write latency, throughput, endurance under the actual write pattern, power-loss protection, error handling and fleet-level telemetry.
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Calling all three categories simply “memory” hides important design decisions. HBM solves accelerator bandwidth, DRAM supplies host working sets, and NAND storage preserves data. A purchase plan that optimises only one of them can move the bottleneck to another layer.
Data movement is a first-class design problem
Inside the server
PCIe and related connectivity link CPUs, accelerators, network adapters and storage devices. The generation and lane configuration determine how much traffic can move without contention. A platform with fast accelerators but insufficient host links can leave compute idle while data waits in queues.
Across servers and racks
Switch silicon and Ethernet infrastructure carry east-west traffic among workers in a cluster and north-south traffic to users, storage systems or other sites. Training jobs can generate sustained synchronisation traffic, while cloud services often mix small, latency-sensitive requests with bulk transfers. Suppliers therefore need to address throughput, buffering, congestion management, latency and operational telemetry rather than quoting a single port rate.
CXL memory expansion and pooling
Compute Express Link (CXL) can attach additional memory to a host or allow memory resources to be shared in architectures designed for pooling. The benefit depends on software support, coherency requirements, access latency and the workload’s tolerance for memory that is farther away than local DRAM. CXL is an architectural option, not an automatic replacement for conventional DIMMs.
Optical engines and silicon photonics
As electrical links become harder to route over distance and power budgets tighten, optical engines, photonic integrated circuits, high-speed electronics and digital signal processors can carry data between switches, servers and racks. STMicroelectronics describes these roles alongside control and power functions, while Marvell’s portfolio includes optical DSPs, Ethernet and PCIe switching, CXL connectivity and storage interfaces. Those are vendor descriptions of product capabilities; they do not prove that one optical topology is best for every operator.
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Optical selection should include reach, connector and fibre plant, transceiver or co-packaged implementation, thermal limits, diagnostics, replacement procedures and interoperability with the switch and network-management software. A link that meets a laboratory rate but is difficult to qualify or service can raise total operating cost.
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How power semiconductors support the system
Accelerators and CPUs operate at tightly controlled voltages and can change their current demand quickly. Power-management ICs, voltage-regulator modules, controllers, clock generators and monitoring circuits convert incoming power into stable rails, sequence startup and shutdown, detect faults and report operating conditions. Gallium-nitride (GaN) and silicon-carbide (SiC) devices can be used in higher-efficiency conversion stages where their electrical and thermal characteristics fit the design.
SIA and Deloitte identify power-management ICs, voltage regulators, clock generators and GaN/SiC devices among the semiconductor categories supporting data-centre racks. STMicroelectronics’ infrastructure overview likewise describes conversion, control, monitoring, optics and connectivity roles. These components sit inside the server and power-delivery chain; they do not replace the broader facility requirements for utility connections, backup generation, uninterruptible power, cooling plant or building construction.
For suppliers, efficiency must be measured at the workload and rack level. A small improvement in conversion loss can reduce heat that the cooling system must remove, but a device with better peak efficiency may not be the best choice if it lacks telemetry, qualification data, fault protection or long-term availability.
Match the component mix to the workload
Distributed model training
Training clusters usually emphasise accelerator throughput, HBM bandwidth and capacity, low-latency scale-out networking and predictable synchronisation. Host CPUs, DDR5 capacity, local NVMe space for datasets and checkpoints, optical links and power delivery still determine whether the accelerators remain busy. The design should measure data loading, checkpointing and collective-communication behaviour, not only accelerator arithmetic.
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Inference services
Inference can be constrained by response-time targets, model size, concurrent requests or cost per query. HBM may hold frequently used weights, while DRAM and SSDs support model staging, retrieval data and application services. Network latency, queueing, power per request and the ability to scale capacity without disrupting service can matter more than peak training throughput.
General-purpose cloud
Virtual machines, databases and web services need balanced CPU, DRAM, storage and network resources. High-capacity DIMMs, reliable SSDs, PCIe connectivity and predictable latency can be more valuable than the highest accelerator bandwidth. CXL expansion may help selected memory-intensive services, but only where the software stack and latency budget support it.
Storage and data analytics
Storage systems prioritise NAND capacity, endurance, controller consistency, network bandwidth and data protection. Analytics pipelines also need enough CPU and DRAM to process data and enough interconnect capacity to prevent storage traffic from starving compute. The correct SSD specification follows the read/write mix and retention policy rather than a generic “fastest” label.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.What the published rack percentages actually mean
A May 2026 Semiconductor Industry Association and Deloitte analysis estimated that memory and storage semiconductors represented more than 20% of semiconductor content value in the specific AI server rack it studied. The same analysis said logic and memory together represented more than 85% of semiconductor value. Both figures describe that report’s rack model and valuation method; they are not averages for every data centre, server generation or facility.
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The practical lesson is that memory and storage are economically material even in an accelerator-focused system. It is not valid to apply the percentages unchanged to a CPU-heavy cloud fleet, a storage appliance or a different rack configuration.
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Read investment forecasts with their dates and scope
SEMI’s June 29, 2026 forecast projected worldwide 300mm memory-fab equipment investment at $52 billion in 2026, a 29% annual increase, and $57 billion in 2027. These are forward-looking industry projections, not realised spending. They indicate how demand for memory capacity and advanced memory is influencing manufacturing plans, but they do not guarantee a particular module, SSD or HBM product’s availability to an individual buyer.
SEMI President and CEO Ajit Manocha said, “Strong demand for high bandwidth memory and other advanced memory technologies is reshaping investment priorities across the semiconductor supply chain,”. The statement explains the direction of investment; procurement teams still need current allocation, qualification and delivery commitments from suppliers.
How to evaluate semiconductor suppliers at system level
Use the following sequence when selecting or qualifying suppliers. It prevents a product-page comparison from becoming a system failure.
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1Scan for outdated or missing drivers - takes under a minute2Clear out junk files and repair common Windows errors3Fix the driver behind crashes, sound loss and screen glitches- Define the workload. Record training, inference, cloud, storage or mixed-service requirements; request rates; model or dataset size; latency targets; throughput; and expected growth.
- Map interfaces and packaging. Confirm CPU socket, accelerator package, memory type, PCIe generation, Ethernet or other network interface, CXL requirements, optical reach, firmware dependencies and board or rack constraints.
- Measure capacity, bandwidth and latency together. Check HBM capacity and bandwidth, DRAM capacity and channel population, SSD usable capacity and endurance, switch throughput and buffering, and the latency added by each hop.
- Calculate operating efficiency. Compare power per completed job, per request or per stored terabyte, not just component wattage. Include voltage-conversion losses, cooling impact, idle power and telemetry overhead.
- Qualify reliability and serviceability. Review error correction, power-loss protection, failure reporting, thermal margins, replacement procedures, firmware support and fleet-management integration.
- Validate supply and lifecycle terms. Ask about qualification status, volume availability, lead times, roadmap, support period, change-notification policy and credible second-source options.
- Test the complete platform. Run representative data movement, memory pressure, storage writes, network congestion and power-transient scenarios. A component’s standalone benchmark cannot establish cluster-level behaviour.
| Comparison axis | Questions to ask |
|---|---|
| Workload fit | Does the part serve training, inference, general cloud, storage or a mixed fleet? |
| Compatibility | Is it supported by the server, package, interface, firmware and operating stack? |
| Performance | What bandwidth, capacity, latency, throughput and scaling behaviour are sustained under the target workload? |
| Efficiency and operations | What are power per workload, thermal requirements, telemetry, reliability and serviceability? |
| Supply and lifecycle | What are qualification, volume, roadmap, support duration and second-source conditions? |
The available industry and company sources establish why these dimensions matter, but they do not provide a neutral head-to-head supplier scorecard or current procurement ranking.
A practical note on server memory purchases
ECC DDR5 RDIMMs are a relevant example for an operator building or upgrading a compatible server. Before ordering, verify the exact CPU platform, supported capacity per channel, rank and module layout, speed rules, firmware requirements and the server manufacturer’s qualified-vendor list. A generic module description does not establish compatibility, price, stock or a valid substitute.
Questions a procurement brief should answer
- Which bottleneck is limiting the target service today: compute, HBM capacity, host DRAM, storage, network, optical reach or power delivery?
- How will the design behave when traffic, memory pressure or write volume doubles?
- Which interfaces and packages are already qualified, and what would a change require?
- What telemetry can operators collect from memory, SSD, switch, optical and power devices?
- What happens when a component is late, revised or unavailable, and is there a tested alternative?
Data-centre semiconductor sourcing is therefore an integration exercise. Accelerators may attract the most attention, but CPUs, multiple kinds of memory, persistent storage, interconnect, optics and power control determine whether the complete installation can be deployed, fed with data, kept within its thermal envelope and operated for its intended life.
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