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99.99% gate fidelity means an average infidelity of 0.01%, or 10-4, for one operation under a specified fidelity definition and benchmarking protocol. A useful translation is roughly one error per 10,000 gate applications. That is an important component-level result, not a guarantee that a complete quantum algorithm will work, that every 10,000th gate fails exactly once, or that the processor is fault-tolerant. Circuit depth, two-qubit performance, measurement and reset errors, leakage, crosstalk, calibration drift and error correction determine practical performance.
What the percentage actually measures
Gate fidelity compares the quantum state produced by a real operation with the state an ideal operation should produce. A reported fidelity of 0.9999 is commonly expressed as an average gate fidelity. Its corresponding average infidelity is:
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1 - 0.9999 = 0.0001 = 10-4
As a percentage, that is 0.01%. If the result represents an error probability under the stated benchmark, the average operation succeeds 99.99% of the time. The word average matters: some input states, qubits, times or pulse conditions can perform better or worse than the reported number.
The figure also depends on how fidelity is defined and measured. Average gate fidelity, worst-case error, diamond-norm bounds, process-tomography estimates and processor-level circuit metrics are related but not interchangeable. A number without its protocol, confidence interval, gate type and error model is incomplete.
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How many gates can a circuit survive?
If every gate had exactly the same independent error probability of 0.0001, the probability that a circuit with N operations succeeds would be approximately (0.9999)N. This is a mathematical illustration, not a forecast for a particular quantum processor.
| Operations | Estimated all-success probability | Interpretation under the independent-error model |
|---|---|---|
| 1,000 | About 90.5% | Roughly one chance in ten of at least one operation error |
| 10,000 | About 36.8% | Errors are likely to affect the uncorrected circuit |
| 50,000 | About 0.67% | An uncorrected computation is very unlikely to complete perfectly |
These percentages assume identical, independent errors and count every operation equally. Real systems violate those assumptions. Two-qubit gates may be less accurate than single-qubit gates; errors can be correlated across qubits, concentrated in particular layers, or caused by leakage into unwanted energy levels. Frequency drift, crosstalk and changing calibration can make the error rate vary during a run. Measurement and reset faults can also spoil an algorithm even when its gates are excellent.
Is 99.99% a good gate fidelity?
For a single operation, it is a strong result and close to the error scale often discussed for scalable architectures. A NIST-hosted randomized-benchmarking publication by Emanuel Knill and colleagues stated in 2007 that scalable quantum computing requires elementary gates with sufficiently low error and described desirable error probabilities as being on the order of 0.0001.
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Historical experimental results show why the context matters. In 2016, NIST reported a single-qubit error per gate of 3.7(3) × 10-5 in beryllium-ion qubits. Under the reported metric, that corresponds to approximately 99.9963% fidelity. IBM Research reported a benchmarked single-qubit gate fidelity of 0.9995 ± 0.0002 in 2016, equivalent to an average infidelity near 0.05% with the stated uncertainty.
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Those results cannot be ranked by percentage alone. They used different hardware, gates, protocols and uncertainty estimates. A 99.99% single-qubit result may coexist with substantially lower two-qubit fidelity, and a processor with a slightly lower isolated-gate number may deliver better circuits through connectivity, calibration and compilation.
Why a high physical-gate number does not make a computer fault-tolerant
Fault tolerance means that encoded, or logical, information can be protected so that increasing the code distance reduces the logical error rate. A physical gate fidelity is only an input to that process. It says nothing by itself about whether an error-correcting code has been implemented, whether logical error decreases with code size, or how much hardware and circuit overhead are required.
Knill’s 2005 summary estimated that the theoretical threshold for independent errors could be well above 3%, while noting that the resource overhead at such high rates would be excessive. The same analysis estimated that about 1% error per gate could support non-trivial algorithms with resources comparable to digital computers. These are threshold and resource discussions under particular assumptions, not a promise that a modern device with any one measured fidelity is fault-tolerant.
In a practical architecture, error correction must handle an entire operation cycle: state preparation, one- and two-qubit gates, measurement, reset, transport or routing, and the classical control that coordinates them. A 99.99% gate can be useful while the full cycle remains above the level needed for a useful logical qubit.
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Single-qubit, two-qubit and processor-level fidelity are different claims
Always identify what operation the number describes.
- Single-qubit fidelity: performance of a gate acting on one qubit, often the easiest operation to optimize.
- Two-qubit fidelity: performance of an entangling gate. These operations are usually more sensitive to calibration, coupling, crosstalk and leakage and often dominate algorithmic error budgets.
- Multi-qubit or layer fidelity: performance of simultaneous operations across a circuit layer. This can expose interactions that isolated gate tests miss.
- Algorithm or circuit fidelity: the probability that an entire compiled circuit produces the intended result. It incorporates depth, routing, measurements and the particular distribution of gates.
A single-qubit randomized-benchmarking value should not be substituted for a two-qubit result, a process-tomography result or a processor-wide metric. NIST’s multiqubit protocol evaluates Clifford operations and separately extracts two-qubit phase-gate error. IBM’s layer-fidelity approach is intended to represent circuits users run and to expose qubit, gate and crosstalk effects at processor level.
How randomized benchmarking produces the number
Randomized benchmarking (RB) applies long sequences of randomly selected gates, followed by an operation intended to invert the sequence. The decay in success probability as the sequence length grows estimates an average error rate. Because the protocol averages over many sequences and does not require perfectly known state preparation and measurement, it is designed to capture computationally relevant errors while reducing sensitivity to preparation-and-measurement (SPAM) imperfections.
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One free scan finds every outdated or missing driver and matches the right update for your exact hardware.Free scan · exact hardware matchSequence length is important. Very short sequences can hide accumulation effects; longer sequences reveal how errors compound, although drift during a long experiment can affect the fit. A credible report should state the gate set, sequence lengths, number of random sequences, fitting method and confidence interval.
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Iterative randomized benchmarking can help separate coherent unitary errors, such as a repeatable over-rotation, from non-unitary errors such as decoherence. IBM reported this method alongside its 0.9995 ± 0.0002 single-qubit result. The distinction matters because coherent errors can accumulate systematically and may be more damaging to a circuit than an equal-sized random error.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.What the percentage can leave out
Before using 99.99% in an architecture or algorithm estimate, check whether the measurement includes:
- Leakage outside the computational qubit states.
- Crosstalk from operations on neighboring qubits.
- Calibration drift over the period in which a circuit runs.
- Correlated or spatially patterned faults rather than independent noise.
- Measurement error and state-reset error.
- Idle periods, transport, routing and compiler-inserted gates.
- Worst-case behavior, rather than an average over inputs or random sequences.
Average fidelity can look excellent while a rare but damaging failure mode remains. For example, a leakage event may persist across later gates, or a shared control error may affect several qubits in one layer. Such faults violate the simple assumption that each operation contributes an independent 0.01% failure probability.
Gate fidelity versus logical fidelity
Physical gate fidelity describes how closely one hardware operation matches its ideal version. Logical fidelity describes the behavior of an encoded operation after error correction and decoding. The practical objective of fault-tolerant computing is not merely to maximize the first number; it is to make the second improve as more physical qubits and larger code distances are used.
Evidence for that transition requires more than a high physical benchmark. Look for demonstrations in which a logical qubit is encoded, repeated error-correction cycles are performed, and the logical error rate decreases as code distance increases. Without that trend, 99.99% remains a component specification rather than evidence of scalable computation.
What 99.99% means for algorithm planning
For shallow circuits
Shallow circuits with relatively few operations may benefit directly from 99.99% gates, especially when they use high-quality two-qubit operations and have short measurement paths. The independent-error calculation suggests that a thousand such operations could retain about 90.5% all-success probability before other error sources are counted.
For deep circuits
At ten thousand operations, the same idealized calculation falls to about 36.8%, and at fifty thousand it falls below 1%. Deep algorithms therefore need error correction, error mitigation, better compilation or a combination of these approaches. Increasing single-qubit fidelity alone does not solve a two-qubit or measurement bottleneck.
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Compare complete error budgets rather than headline percentages. Ask for two-qubit fidelity, simultaneous-operation performance, measurement and reset error, connectivity, calibration stability, leakage characterization and the circuit-level metric used. A processor-level layer result may be more informative for a planned workload than the best isolated gate on one qubit.
A practical checklist for evaluating a 99.99% claim
- Identify the operation: confirm whether it is a one-qubit, two-qubit, Clifford, phase or other gate.
- Identify the metric: determine whether 99.99% is average gate fidelity, error per gate, a worst-case bound or a different quantity.
- Read the protocol: check whether randomized benchmarking, iterative RB, tomography, cross-entropy or another method produced the number.
- Check uncertainty: record the confidence interval, date, number of sequences and sequence-length range.
- Check conditions: note the qubits tested, temperature or operating state, calibration window and whether gates ran simultaneously.
- Inspect omitted errors: look for leakage, crosstalk, drift, measurement, reset and correlated-noise data.
- Translate to the workload: estimate the number of one- and two-qubit operations, layers, idle periods and measurements in the intended circuit.
- Look for logical evidence: if fault tolerance is claimed, verify that logical error decreases with code distance or repeated correction cycles.
The practical verdict
99.99% gate fidelity is approximately a 0.01% average error per operation, a level often associated with the per-gate error scale needed for scalable architectures. It is excellent evidence about one measured component under one protocol. It is not, by itself, evidence that a processor can execute a long algorithm reliably or that it is fault-tolerant. Practical quantum computing depends on the complete stack: high-quality two-qubit gates, stable calibration, low measurement and reset error, adequate connectivity, suppression of correlated faults and error correction that converts physical improvements into declining logical error.
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