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Repair common Windows errors and clear accumulated junk for a smoother, more stable PC - no reinstall needed.Free scan · no reinstallSamsung is developing 4F² DRAM, but its president and CTO has not committed to a production date. CXMT says it plans to unveil a 4F² server DDR5 registered DIMM before the end of 2026; that is a launch target, not proof of qualified, high-volume manufacturing.
What Samsung actually confirmed
At SEDEX 2026 on October 14, Samsung Electronics president and CTO Song Jae-hyuk was asked whether the company was developing 4F² DRAM. He answered “Yes” and said, “We’re working hard on it.” He did not provide a development milestone, adoption decision or mass-production schedule, according to eDaily’s report from the event.
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That wording establishes an active Samsung program, not a commercial release commitment. Earlier reports mentioned possible mass production around 2028 for the related D0a-V effort, but subsequent coverage says the program has no firm adoption timeline. The most defensible description is a research-backed development project with an uncertain production schedule.
CXMT is promising a product unveiling, not confirmed volume production
CXMT says its first 4F² product will be a server-grade DDR5 registered DIMM (RDIMM) using a 4F² cell structure and hybrid bonding. The company’s president, Cao Kanyu, reportedly put the unveiling before the end of 2026. Tom’s Hardware reported that the design uses vertical transistors.
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CXMT has not published a specific release date, operating speed, module or die capacity, customer-qualification status, yield data or mass-production schedule for that 4F² RDIMM. Seoul Economic Daily’s experts therefore characterize the statement as a planned launch announcement rather than evidence that volume shipments have begun. CXMT has also not posted a matching 4F² product release in either its Chinese- or English-language newsroom.
Why 4F² matters compared with 6F² DRAM
The “F²” notation describes the area assigned to one memory cell, where F is the relevant feature dimension. A conventional 6F² cell occupies a 3F by 2F rectangle. A 4F² cell fits into a 2F by 2F layout.
| Cell layout | Geometric footprint | Theoretical result at the same feature size |
|---|---|---|
| 6F² | 3F × 2F | Baseline |
| 4F² | 2F × 2F | One-third less cell area and a theoretical 50% density increase |
The tighter layout usually requires a vertical transistor—such as a vertical surrounded-gate or vertical-channel design—to free horizontal space. Samsung’s 16Gb prototype, presented in an ISSCC 2026 paper, uses vertical-channel transistors. CXMT has described vertical transistors in its planned server module.
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The arithmetic does not guarantee that a finished DRAM chip will be one-third smaller or hold 50% more bits. Peripheral circuits, sense amplifiers, wiring, bonding structures, defect-repair space and manufacturing margins all affect the final die. Most importantly, the two suppliers are not claiming the same process dimensions.
Process dimensions could narrow the practical advantage
Seoul Economic Daily reports that CXMT’s proposed 4F² cells use a 15 nm line width, while Korean suppliers’ 6F² cells use a 12.2 nm line width. A larger feature dimension can offset part of the geometric benefit of moving from 6F² to 4F², leaving practical density potentially comparable rather than automatically superior.
Real competitiveness will depend on whether CXMT can achieve acceptable yield, speed, capacity and cost with the vertical-transistor and bonding process. None of those production metrics has been disclosed for the announced RDIMM.
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Samsung has demonstrated a prototype, but not a shipping part
Samsung’s ISSCC 2026 paper describes a working 16Gb 4F² DRAM prototype. The reported implementation combines vertical-channel transistors with wafer-to-wafer hybrid copper bonding. A prototype demonstrates that the cell and integration scheme can operate; it does not establish the defect rates, reliability, cost or customer qualification needed for server deployment.
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Samsung is already a major DRAM supplier. Its first-quarter 2026 interim report estimated a 38.4% share of global DRAM revenue and said the company had begun mass shipments of HBM4 while expanding high-density DDR5 and other AI-focused memory. Those figures describe Samsung’s current business, not the commercial status of its 4F² technology.
CXMT’s G5 production claim is a separate development
CXMT’s official September 20, 2026 announcement says its fifth-generation DRAM platform, G5, is in mass production. The release reports an 11.95 nm active-area half-pitch, a 45:1 capacitor aspect ratio and 24Gb LPDDR5X products in mass production.
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That release does not say G5 is the separate 4F² server DDR5 RDIMM announced in October. CXMT’s documented G5 shipments should therefore not be used as evidence that its 4F² server design is already in mass production.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.Samsung and CXMT: what is public today
| Comparison point | Samsung | CXMT |
|---|---|---|
| Public status | Working 16Gb 4F² research prototype shown in an ISSCC 2026 paper | Planned unveiling of a 4F² server DDR5 RDIMM before the end of 2026 |
| Cell and transistor approach | 4F² cell with vertical-channel transistors | 4F² cell with vertical transistors |
| Bonding approach | Wafer-to-wafer hybrid copper bonding | Hybrid bonding; implementation details not stated in the announcement |
| Disclosed capacity | 16Gb prototype | Not stated by CXMT for the planned RDIMM |
| Disclosed speed | Not stated for the prototype | Not stated for the planned RDIMM |
| Reported line-width context | Korean suppliers’ 6F² comparison cells are reported at 12.2 nm | Proposed 4F² cells reported at 15 nm |
| Customer qualification and yield | No commercial qualification or yield evidence disclosed | No commercial qualification or yield evidence disclosed for the 4F² RDIMM |
| Production timing | No firm 4F² production date; earlier 2028 reporting is not a commitment | Unveiling targeted by year-end 2026; volume-production schedule not stated |
What a 4F² DDR5 RDIMM announcement would mean for servers
An RDIMM is a registered memory module used in servers, where the register helps manage signaling between the memory controller and DRAM devices. A future 4F² DDR5 ECC RDIMM could offer a path to higher capacity or lower die-area cost, but the cell geometry alone cannot establish either outcome.
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What to watch next
- CXMT’s actual event and datasheet: Look for a concrete launch date, die or module capacity, data rate, voltage, package details and availability beyond a demonstration.
- Production evidence: Capacity allocation, customer qualification, sustained shipments and yield information would distinguish mass production from a first unveiling.
- Samsung’s adoption decision: A firm process node, customer program or production schedule would move Samsung’s effort beyond prototype status.
- Independent density comparisons: Compare complete die density and usable module capacity, not just the 4F² versus 6F² cell-area calculation.
- Reliability and cost: Hybrid bonding and vertical transistors must meet server-grade endurance, thermal and manufacturing requirements at an acceptable cost.
The bottom line
Samsung has confirmed that 4F² DRAM development is underway and has already shown a 16Gb research prototype. CXMT may unveil a 4F² server DDR5 RDIMM by the end of 2026, giving it a potential timing advantage in public announcements. Neither company has supplied the production proof needed to declare a qualified, high-volume 4F² server-memory lead. The geometry promises more density, but feature size, yield, qualification, capacity and cost will decide who turns that promise into a competitive product.
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