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Short answer: A physical qubit is a single, imperfect hardware element. A logical qubit is an encoded quantum state spread across several physical qubits, with error-correction circuits repeatedly measuring error syndromes and a decoder correcting likely faults. There is no universal number of physical qubits per logical qubit: the overhead depends on the code, hardware quality, connectivity, decoder, and logical-error target.
Adding qubits reduces errors only when the physical error rates are below the relevant fault-tolerance threshold. Above that threshold, a larger code can make performance worse. To interpret any result, identify the error-rate denominator (for example, per gate, correction round, or algorithm), the code distance, and whether the experiment shows improvement as the code grows.
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What is the difference between a physical qubit and a logical qubit?
A physical qubit is one hardware qubit implemented by a device such as a superconducting circuit, trapped ion, or another quantum technology. It can be prepared, manipulated with gates, measured, and connected to other qubits. Every one of those operations is imperfect. Noise can cause bit flips, phase flips, leakage out of the computational space, unwanted interactions, loss of coherence while the qubit is idle, and incorrect readout.
A logical qubit is not a separate kind of hardware. It is an encoded quantum state distributed over a group of physical qubits. Quantum-error-correction (QEC) circuits repeatedly measure auxiliary information called error syndromes. A classical decoder analyzes the syndrome history and chooses a likely correction, while preserving the quantum information being protected. Google Quantum AI summarizes the idea as encoding information “across multiple physical qubits to form a ‘logical qubit.’”
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The distinction is therefore about abstraction and reliability:
| Aspect | Physical qubit | Logical qubit |
|---|---|---|
| What it is | One hardware qubit | An encoded state spread across many physical qubits |
| Main weakness | Directly exposed to gate, measurement, idle, leakage, and environmental errors | Can still fail, but QEC detects patterns of faults and suppresses many of them |
| How it is operated | Native gates and measurements on the device | Repeated syndrome measurements, decoding, and fault-tolerant logical operations |
| Resource cost | One hardware site | Many physical qubits plus control, measurement, wiring, and decoding capacity |
| Reliability metric | Physical gate, readout, idle, or leakage error | Logical failure probability for a stated operation or correction interval |
A logical qubit is consequently an error-managed abstraction, not an isolated “better” qubit sitting inside the processor.
How quantum error correction protects information
Encoding without directly measuring the data
Quantum mechanics prevents a straightforward copy-and-check strategy: an unknown quantum state cannot simply be duplicated, and measuring the state directly would generally destroy the superposition being protected. QEC instead encodes one logical state into entanglement among data qubits and measures properties that reveal whether an error occurred, not the value of the protected state itself.
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Those property measurements are syndrome measurements. A syndrome indicates a pattern consistent with a bit-flip, phase-flip, or other fault. The decoder combines current and earlier syndromes, accounts for the code and device noise model, and selects a correction or updates a software record of the correction. Syndrome extraction is repeated because a single measurement can itself be faulty.
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Small teaching codes and large surface-code designs
Microsoft’s educational nine-qubit example encodes one logical qubit and can correct both bit-flip and phase-flip errors. It is useful for understanding redundancy and syndrome extraction, but it is not a universal hardware recipe.
Large-scale proposals often use surface codes. In Google’s description, a patch of nearest-neighbor physical qubits works together as one more reliable logical qubit. Increasing the code distance enlarges the patch and gives the decoder more information about where an error chain may have occurred. That extra protection also consumes more qubits, measurements, control bandwidth, and decoding work.
How many physical qubits make one logical qubit?
There is no fixed conversion ratio. “One logical qubit” can mean different code families, code distances, noise assumptions, connectivity layouts, and target logical error rates. A compact demonstration code and a fault-tolerant architecture designed for a demanding computation should not be compared as if they used the same unit.
Evidence from experimental and design examples
| Example | Physical-qubit count | What it demonstrates | Important qualification |
|---|---|---|---|
| Microsoft educational code | 9 for 1 logical qubit | Encoding and correction of bit-flip and phase-flip errors | Teaching example, not a universal overhead |
| Google experimental comparison | 17 versus 49 | The 49-physical-qubit logical qubit outperformed the 17-qubit version in that experiment | Result applies to that device, code, decoder, and benchmark |
| Google surface-code design example | 577 for code distance 17 | Projected logical error rate below 1 in 106 under stated assumptions | Architecture- and noise-model-specific target, not a rule that every logical qubit needs 577 qubits |
The 17-versus-49 result is especially important because it shows a scaling trend: a larger encoded block can outperform a smaller one when the underlying device operates in the useful, below-threshold regime. It does not establish a universal ratio of 49 physical qubits to one logical qubit.
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Why the overhead varies
- Code family and distance: Different codes use different layouts and redundancy. Higher distance generally requires more physical qubits.
- Target logical error: Reaching a failure probability below 1 in 106 requires more protection than merely demonstrating an encoded state.
- Physical error mix: Two processors with the same average gate error can behave differently if one has more leakage, correlated faults, or measurement errors.
- Connectivity: A code requiring nearest-neighbor interactions may need a different layout, routing overhead, or additional ancillas on a limited-connectivity chip.
- Decoder and control: Real-time syndrome processing and feedback are part of a practical logical qubit, not optional accessories.
What is a logical error rate?
A logical error rate is the probability that the encoded operation or correction process still fails after syndrome processing and decoding. It is not automatically the same as a physical gate-error percentage. The denominator must always be stated.
| Possible denominator | Meaning |
|---|---|
| Per physical gate | Chance that one native hardware gate produces an error |
| Per measurement | Chance that a readout returns the wrong result |
| Per correction round or cycle | Chance that one complete repeated-QEC interval leaves an uncorrected logical fault |
| Per logical gate | Chance that a fault-tolerant encoded gate fails |
| Per algorithm | Probability that the full computation produces an incorrect result |
For example, “a logical error rate of 10-6” is incomplete without saying whether that is per cycle, per logical gate, or per algorithmic operation. A lower percentage is meaningful only when the code distance, decoder, circuit, noise model, and time unit are comparable.
Physical gate errors are only one input
Microsoft describes current state-of-the-art quantum computers in a broad educational range of roughly 1% to 0.1% physical gate error per operation (Microsoft page accessed in 2026). That range is not a specification for every processor, and it does not describe readout error, idle error, leakage, correlated faults, correction-cycle failure, or whole-algorithm success. A QEC design must characterize each relevant error channel rather than substitute one headline number for all of them.
Does adding more qubits reduce errors?
Only conditionally. QEC adds redundancy, so a larger code can suppress logical errors when the physical error rate is below the code’s effective threshold. In that regime, increasing code distance can make the logical error rate fall, often dramatically under the code’s assumptions.
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If physical faults are too frequent, however, the syndrome information is overwhelmed. Google’s surface-code explanation warns that making the lattice larger can then make processor performance worse. More qubits create more locations where errors can occur, and the decoder cannot distinguish the intended error pattern reliably once faults are too dense or too correlated.
What “below threshold” means
The threshold is not one universal percentage for all hardware. It is a boundary determined by the code, circuit schedule, error bias, measurement quality, connectivity, decoder, and assumptions about correlated noise. Below the effective threshold, larger codes tend to improve logical performance; above it, extra redundancy may add more opportunities for failure than protection.
The 2022 Nature experiment reported that increasing surface-code size began to improve logical performance. That below-threshold milestone is stronger evidence than merely preparing one encoded state, because it shows the expected direction of scaling. It still does not guarantee that every larger device will improve: fabrication variation, leakage, calibration drift, decoder latency, and long-range correlations can change the result.
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Use the following checklist when a paper, presentation, or product announcement reports a logical qubit.
- Identify every error metric. Record physical gate, measurement, idle, leakage, and logical error rates separately.
- Write down the denominator. Confirm whether each number is per gate, measurement, round, cycle, logical operation, or complete algorithm.
- Record the code and distance. A distance-3 demonstration and a distance-17 design target have different protection and overhead.
- Count the physical qubits actually involved. Include data, syndrome-measurement ancillas, routing qubits, and inactive or discarded sites when the report does so.
- Check the scaling direction. Compare at least two code sizes and ask whether the larger code has a lower logical error under the same benchmark.
- Inspect the decoder. Note whether decoding is offline, whether latency is measured, and whether feedback keeps up with repeated cycles.
- Ask what operation was tested. State preparation and final measurement are less demanding than a long sequence of repeated fault-tolerant logical gates.
- Check lifetime and repetition. A useful logical qubit must survive many correction cycles, not just one successful experiment.
What makes a logical qubit scalable?
A scalable logical qubit must be more than an encoded state that works once. Microsoft’s 2026 scalable-logical-qubit proposal describes one as a qubit preserved through repeated QEC, able to perform fault-tolerant universal operations with low-latency real-time decoding and feedback, and replicable to the hundreds or thousands needed by applications.
Operational requirements
- Repeated fault-tolerant cycles: Syndrome extraction must continue while the computation runs.
- Reliable measurements: Ancilla readout errors must be low enough for the decoder to identify data-qubit faults.
- Fast decoding: Classical processing must keep pace with the hardware; otherwise corrections arrive too late or control data accumulates.
- Controlled leakage: Population outside the computational states can evade simple bit- and phase-flip models and contaminate later cycles.
- Low correlated-error rates: A code that assumes mostly independent faults can fail when one event affects many qubits.
- Logical gate set: The system needs a practical route to universal, fault-tolerant operations, not only memory.
- Replication: Applications require many logical qubits operating together, with acceptable communication and synchronization overhead.
This is why a headline physical-qubit count alone says little about readiness. The control stack, decoder, calibration stability, wiring, and demonstrated logical operations are part of the resource estimate.
How to learn and experiment with QEC circuits
You can study the principles without access to a quantum processor. Google’s developer guidance points to open-source Cirq, Stim, and Crumble tools for circuit and QEC experimentation. They let learners create syndrome circuits, inject modeled faults, run decoders, and examine how logical performance changes with code size and noise assumptions.
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- Start with a small code. Build a repetition or nine-qubit-style example to see how syndromes identify bit- and phase-flip patterns.
- Separate noise channels. Simulate gate, measurement, idle, and leakage-like faults independently before combining them.
- Measure a stated quantity. Report logical failures per correction cycle or per logical operation, rather than an unqualified “accuracy.”
- Vary code distance. Run the same benchmark at multiple sizes and look for a decreasing logical error rate.
- Stress the decoder. Add measurement noise, delayed syndromes, or correlated faults to see when the apparent advantage disappears.
- Compare resources. Track physical-qubit count, number of measurements, circuit depth, and decoding time together.
Simulation results are conditional on the selected noise model. They demonstrate what follows from those assumptions, not how a particular processor will perform.
What error rate is good enough for fault-tolerant quantum computing?
There is no single “good enough” percentage independent of context. The relevant requirement is that the logical error probability for every operation be low enough for the algorithm’s depth, number of logical qubits, and acceptable chance of a wrong final result. A code must operate below its effective threshold, and the resulting logical rate must continue improving as protection is increased.
For a memory experiment, a logical error per correction cycle may be the right metric. For a quantum algorithm, logical error per gate and accumulated failure over the complete circuit matter more. A rate that looks excellent per cycle can still produce an unacceptable algorithm-level failure if the computation uses millions or billions of operations.
The most defensible comparison therefore reports a complete tuple: physical error channels and measurement protocol; code family and distance; physical-qubit count and connectivity; decoder and latency; logical error denominator; lifetime over repeated cycles; and whether the result improves with code size. Without that context, a percentage cannot establish fault-tolerant capability.
Quick Recap
Key takeaways
- Physical qubits are noisy hardware; logical qubits are encoded states actively protected by QEC.
- There is no universal physical-to-logical conversion ratio. The nine-qubit teaching example, the 17-versus-49 experimental comparison, and the 577-qubit distance-17 design target answer different questions.
- Logical error rates must name their denominator and benchmark.
- More qubits help only below the relevant threshold and when measurement, leakage, connectivity, decoding, and correlated errors are controlled.
- A scalable logical qubit must survive repeated correction, support fault-tolerant operations, decode in real time, and be replicable at application scale.
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