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Neither platform is a universal energy-efficiency winner. NVIDIA says a GB200 NVL72 rack delivers 25 times more performance at the same power as H100 air-cooled infrastructure, but that is a vendor claim against an older NVIDIA reference, not a matched GB200-versus-AMD result. AMD’s MI350X and MI355X accelerators offer 288 GB of HBM3E and 8 TB/s of memory bandwidth, plus MXFP4 and MXFP6 support that can improve efficiency on compatible workloads. To determine which uses less electricity for your AI service, measure output tokens per joule with the same model, precision, latency target, concurrency, software stack, accelerator count and whole-system power boundary.
What energy efficiency means for an AI accelerator
Energy efficiency is a workload measurement, not a permanent property of a chip family. For inference, the most useful metric is output tokens per joule:
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tokens per joule = generated output tokens ÷ energy consumed in joules
Energy is power integrated over time. A system drawing 8 kilowatts for 10 seconds uses 80 kilojoules. If it produces 8,000 quality-equivalent tokens during that interval, its result is 100 tokens per joule. The calculation is meaningful only when the tokens have the same model quality, sequence lengths, decoding settings and latency service level.
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NVIDIA describes inference energy efficiency as output tokens per joule of GPU energy during profiling. That definition is useful for accelerator comparisons, but a data-center operator usually needs a wider boundary: host CPUs, memory, storage, network adapters, voltage-conversion losses and cooling. A GPU can look efficient inside a narrow GPU-only measurement while the complete server or rack consumes substantially more.
Energy also differs by phase. A model may have excellent inference efficiency but require more energy to train, or vice versa. Separate measurements for training, fine-tuning, batch inference and interactive inference prevent one favorable result from being generalized to every use case.
What is being compared: a rack platform and an accelerator family
NVIDIA GB200 NVL72
GB200 NVL72 is a rack-scale Grace Blackwell system, not a single plug-in card. NVIDIA’s DGX GB200 configuration combines 72 Blackwell GPUs with 36 Grace CPUs and lists 1,440 PFLOPS of FP4 Tensor Core performance. Its design uses a large shared NVLink domain so the GPUs can exchange model data at high bandwidth inside the rack.
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The rack-level design matters for energy accounting. Communication, CPU work, memory traffic, networking and cooling can be a significant part of the power budget when a model is split across many accelerators. Measuring one Blackwell GPU and calling that a GB200 result omits the system characteristics that make NVL72 different from a conventional server.
AMD Instinct MI350-series
“Instinct” covers several generations and system configurations, so a comparison must name the exact part. AMD’s MI350-series information identifies MI350X and MI355X with 288 GB of HBM3E and 8 TB/s of memory bandwidth. The generation supports the MXFP6 and MXFP4 low-precision formats, intended to reduce data movement and arithmetic cost when a model and software kernels can use them without unacceptable quality loss.
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AMD’s published MI300 information gives MI325X a 1,000-watt accelerator design point and theoretical throughput figures, while warning that actual performance varies with system configuration. MI325X, MI350X and MI355X should therefore be reported separately. An eight-GPU server, a multi-node cluster and a rack-scale installation will have different host, interconnect and cooling overheads even when the accelerator model is identical.
What the published numbers do—and do not—prove
| Published figure | Attribution and context | What it can support | What it cannot support |
|---|---|---|---|
| 25× more performance at the same power | NVIDIA’s current GB200 NVL72 product claim versus NVIDIA H100 air-cooled infrastructure | GB200 can be dramatically more efficient than that stated H100 reference for the workload and boundary NVIDIA used | A direct GB200-versus-MI355X energy ranking |
| 288 GB HBM3E; 8 TB/s bandwidth | AMD product information for MI350X and MI355X, 2025 | Large models may fit with less sharding, and memory-bound kernels have substantial bandwidth available | A guaranteed tokens-per-joule result |
| 1,440 PFLOPS FP4 | NVIDIA DGX GB200 datasheet for 72 Blackwell GPUs and 36 Grace CPUs | Theoretical rack-level FP4 capability for that configuration | Delivered application throughput or energy efficiency |
| 1,000 W accelerator design point | AMD MI325X information | A planning value for the accelerator’s power envelope | The consumption of a complete MI325X server or an MI355X system |
| 100,282 tokens/s versus 32,028 tokens/s | AMD’s 2026 MLPerf 6.0 material: MI355X FP4 compared with MI325X FP8 | AMD’s reported throughput for two different products and precisions | An efficiency verdict, because precision, generation and system conditions differ |
| 17,457 MLPerf Inference v5.0 results from 23 organizations | MLCommons, 2025 | The breadth of a public, independently submitted benchmark database | Proof that every result is directly comparable across models, power boundaries and configurations |
The 25× statement is especially easy to misread. “At the same power” means NVIDIA’s compared systems delivered different performance while the stated power condition was held equal; it does not mean an NVL72 rack consumes only one twenty-fifth as many watts as every Instinct installation. It is also a comparison with H100 air-cooled infrastructure, not with AMD’s current generation.
Likewise, theoretical PFLOPS is a ceiling based on arithmetic throughput. Real applications can be limited by memory capacity, memory bandwidth, communication, kernel availability, synchronization, decoding overhead or CPU input processing. Tokens per second is an observed workload result, while tokens per joule additionally requires a measured power trace.
Why the same model can produce different energy results
Precision and quality target
FP4, FP6, FP8 and FP16 are not interchangeable labels. Lower precision can reduce memory traffic and increase arithmetic throughput, but it may change output quality or require calibration, scaling and selective higher-precision layers. Compare systems only after defining an accuracy, perplexity, pass-rate or human-evaluation target. If one result uses FP4 and another uses FP8, report them as separate operating points rather than declaring the faster result more efficient.
Batch size, concurrency and sequence length
Interactive chat usually prioritizes time to first token and inter-token latency at modest concurrency. Offline document generation can maximize throughput with larger batches. Prefill-heavy prompts stress different parts of the system than decode-heavy generation. Record prompt length, generated length, batch size, concurrent requests, maximum sequence length and latency percentiles. A platform optimized for full utilization in batch mode may be a poor choice for a lightly loaded service.
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Model partitioning and communication
A model that fits in one accelerator avoids some synchronization and interconnect traffic. A larger model may need tensor, pipeline or expert parallelism. MI350X and MI355X’s 288 GB of HBM3E can reduce the number of partitions for some models. GB200 NVL72’s Grace CPUs and NVLink-connected Blackwell GPUs can reduce communication overhead inside its rack. Neither advantage guarantees lower energy: the result depends on how much data is exchanged and how effectively the software overlaps communication with computation.
Software and kernel maturity
Energy is partly a software result. Fused attention, quantized matrix-multiply kernels, paged key-value caching, communication libraries, compiler versions and serving schedulers determine how much of the hardware is active. Measure the exact driver, runtime, framework, model implementation and optimization flags you will deploy. A theoretical low-precision mode that lacks a mature kernel for your model can consume more energy than a well-optimized higher-precision path.
How to run an apples-to-apples energy test
- Freeze the model and quality target. Use the same model checkpoint, tokenizer, weights, prompt set, sampling policy and acceptance criteria. If quantization is required, create equivalent calibration and validation procedures for both platforms.
- Choose one precision per test. Run matched FP16, FP8, FP6 or FP4 tests where both stacks support the format. Publish separate rows when a format exists on only one platform.
- Define the service objective. Set the same concurrency, prompt and output lengths, time-to-first-token target, inter-token latency target and tail-latency limit. Do not compare a throughput-maximized run with a latency-constrained run.
- Choose the power boundary before measuring. At minimum, log accelerator power. For deployment decisions, include host CPU, memory, storage, network adapters, voltage conversion and cooling. State whether idle power is included and allocate shared infrastructure consistently.
- Warm up and stabilize. Load the model, fill caches as the real service would, then discard warm-up samples. Measure only steady-state intervals long enough to average clock and fan fluctuations. Record ambient temperature and cooling mode.
- Log performance and power together. Capture generated tokens, input tokens, tokens per second, joules, average and peak watts, latency percentiles, utilization, memory use, software versions and accelerator count. Integrate the power trace over the same interval as the token count.
- Repeat at realistic loads. Test low, medium and saturation concurrency. Include single-node and multi-node cases. GB200 NVL72 is a rack platform, while Instinct deployments may be eight-GPU servers or larger clusters; comparing only one scale can hide communication and cooling effects.
- Publish uncertainty and exclusions. State meter accuracy, sampling interval, whether networking and cooling were measured, and any use of sparsity, speculative decoding or dynamic voltage and frequency controls. A reproducible result is more valuable than an impressive but unexplained number.
MLCommons’ MLPerf Inference suite is a useful reference because MLPerf Inference v5.1 is described as architecture-neutral and reproducible. MLPerf Power combines performance with measured power, which is closer to the question a data-center buyer is asking than a peak-throughput specification. Public submissions still need to be read at the level of model, scenario, system and power definition; a benchmark database is not one universal operating point.
Inference: where tokens per joule matters most
For a production text-generation service, calculate at least two numbers: decode tokens per joule for ongoing generation and end-to-end tokens per joule including prompt processing, scheduling and host work. Report input and output tokens separately so a long-context workload is not mistaken for a short-chat result.
GB200 can benefit when many Blackwell GPUs cooperate on a large model and NVLink keeps tensor exchanges inside the rack. The benefit is greatest when the serving software can keep the GPUs busy and avoid repeatedly moving data through slower links. If demand is sparse or requests are small, the rack’s fixed CPU, memory and networking draw can dominate.
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MI355X can benefit from its large HBM3E capacity and MXFP4 or MXFP6 support when the model, quantizer and ROCm software path use those features effectively. Fitting more weights and key-value cache locally can reduce sharding and communication. The measured outcome still depends on kernel occupancy, clock limits, host overhead and the quality target.
AMD reports 100,282 tokens per second for MI355X FP4 and 32,028 tokens per second for MI325X FP8 in its 2026 MLPerf 6.0 material. Those figures show a large reported throughput difference between generations and precisions, but they do not provide joules per token and should not be converted into an energy ranking. A power trace from the same test, with matched conditions, is required.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.Training and fine-tuning energy
Training efficiency is better expressed as time or energy to reach a defined loss, accuracy or benchmark score. Peak FLOPS alone ignores data loading, checkpointing, evaluation, optimizer states and failed or restarted jobs. Measure total wall-clock energy from the first training step through the accepted checkpoint, including host and network power where possible.
Memory capacity affects training energy indirectly. More HBM can reduce tensor or pipeline partitions, lowering synchronization and communication. However, a larger accelerator can also have a higher idle or peak draw. The right question is whether the reduction in training time and communication energy outweighs that additional draw for your batch size and parallelism strategy.
For fine-tuning, compare the same parameter-efficient method, sequence length, gradient accumulation, checkpoint interval and number of validation steps. A platform that wins full-precision pretraining may not win a small adapter-tuning job that spends much of its time waiting on input pipelines.
Memory, interconnect and cooling trade-offs
| Decision axis | GB200 NVL72 consideration | MI350X/MI355X consideration | Energy implication |
|---|---|---|---|
| Memory capacity | 72 Blackwell GPUs in a shared rack-scale domain | 288 GB HBM3E per MI350X/MI355X accelerator | More local capacity can reduce model partitioning and data movement, but only measured utilization proves the saving |
| Bandwidth | High-bandwidth NVLink domain plus GPU memory | 8 TB/s HBM3E bandwidth listed by AMD | Bandwidth can raise useful work per watt for memory-bound kernels; it does not guarantee efficiency for compute-bound models |
| Scale | DGX GB200 reference has 72 GPUs and 36 Grace CPUs | Instinct systems range from individual accelerators to multi-GPU and multi-node clusters | Rack-level fixed power and communication must be included at the scale you will deploy |
| Cooling | GB200 NVL72 is a dense rack design with substantial facility requirements | MI325X has a 1,000 W accelerator design point; system cooling depends on the server design | Cooling and power-delivery overhead can change whole-facility tokens per joule |
Cooling is not a footnote. Air, direct liquid and facility-water systems have different pump, fan and heat-exchanger loads. NVIDIA’s 25× statement mentions reduced water consumption relative to H100 air-cooled infrastructure, but that does not establish water or electricity performance against an AMD installation with a different cooling design. Ask vendors for total rack power, cooling design conditions, inlet temperature range and workload-specific measurements.
Software compatibility as an efficiency variable
Before buying hardware, run the exact model through the intended serving stack. Check support for quantization formats, attention implementations, mixture-of-experts routing, key-value-cache management, collective communication and monitoring. Verify that the compiler produces the expected kernels rather than silently falling back to a slower path.
- Record driver, firmware, runtime, compiler, framework and serving-server versions.
- Confirm that MXFP4 or MXFP6 on Instinct, or FP4 on Blackwell, is actually active in the measured kernels.
- Check whether sparsity is enabled and whether both systems receive equivalent sparse or dense work.
- Measure CPU utilization and data-loader time; a starved accelerator can look inefficient even when its compute hardware is excellent.
- Use the same stopping criteria and output validation so faster, lower-quality output is not counted as an efficiency win.
Software changes quickly. A result tied to one framework release should be treated as a dated operating point, not a permanent architectural ranking. Re-run the benchmark when kernels, drivers, quantization libraries or model versions change.
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Choose a GB200-class deployment when
- Your model needs a tightly coupled, rack-scale GPU domain and benefits from high-speed GPU-to-GPU communication.
- You can operate the required dense power and cooling infrastructure.
- The production software stack is already optimized for Blackwell and delivers strong measured tokens per joule at your latency target.
- You need a validated path for the specific model at large concurrency rather than a theoretical peak number.
Choose an MI350X or MI355X deployment when
- Your model benefits from 288 GB of local HBM3E and 8 TB/s bandwidth, reducing sharding or memory traffic.
- MXFP4 or MXFP6 provides acceptable quality and the available software kernels use those formats efficiently.
- You can validate the ROCm-based stack, communication pattern and monitoring tools for your workload.
- An eight-GPU or modular cluster fits your facility and scaling needs better than a full rack platform.
Require a measured pilot when
- Your service mixes short interactive requests with long-context or batch jobs.
- Power, cooling or rack density is constrained, making whole-system overhead material.
- The model is near a memory-capacity boundary or uses unusual operators that may trigger software fallbacks.
- Procurement depends on a claimed performance multiplier rather than a matched power trace.
A practical scorecard for procurement
| Metric | How to record it | Why it matters |
|---|---|---|
| Quality-equivalent output tokens per joule | Generated tokens divided by measured energy at a fixed quality target | Primary inference efficiency measure |
| Time to first token and inter-token latency | Report median and tail percentiles at each concurrency | Prevents throughput-only wins that violate user experience targets |
| End-to-end power | GPU plus host, memory, network and cooling where available | Shows facility impact rather than component efficiency alone |
| Memory headroom | Weights, activations and key-value cache used versus available HBM | Identifies when sharding or swapping will add energy |
| Scale-out overhead | Tokens per joule at one node and at the planned cluster size | Reveals communication and fixed-infrastructure costs |
| Software maintenance | Kernel coverage, upgrade cadence and reproducibility of the measured stack | Determines whether the efficiency result can survive production updates |
Give each platform the same workload mix rather than averaging unrelated benchmark claims. Weight interactive, batch and training scenarios according to your actual demand. Keep the raw power traces and configuration files so a vendor or internal team can reproduce an unexpected result.
How to interpret vendor and benchmark claims
Ask five questions whenever you see a large efficiency number:
- What exact hardware and system configuration was measured?
- Which model, precision, sequence lengths, batch size and latency objective were used?
- Does “power” mean GPU-only, server input, rack input or facility energy including cooling?
- Was the result measured, simulated or calculated from theoretical throughput?
- Can the result be reproduced with public software and an equivalent workload?
MLCommons reported 17,457 MLPerf Inference v5.0 results from 23 organizations in 2025, including submissions using AMD MI325X and NVIDIA GB200. That breadth is valuable, but each result remains tied to its benchmark scenario and submitted system. MLPerf Inference v5.1’s architecture-neutral, reproducible design and MLPerf Power’s combination of performance and measured power make them strong starting points for comparison; they do not eliminate the need to inspect boundaries and configurations.
Bottom line for a data-center decision
GB200 NVL72 has a compelling rack-scale design and NVIDIA’s claim of 25× more performance at the same power versus H100 air-cooled infrastructure. MI350X and MI355X counter with 288 GB HBM3E, 8 TB/s bandwidth and MXFP4/MXFP6 capability that may reduce memory and arithmetic cost for suitable models. Those facts describe different advantages, not a head-to-head energy result.
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