Reduce multi-rack AI inference latency by finding which part of the path is slow before changing software settings. Request latency, time to first token, inter-token delay, collective-communication time, point-to-point network latency, and tail stalls are different measurements. A healthy bandwidth test does not prove that p95 or p99 requests are healthy.
The reliable sequence is: define the user-visible symptom, measure the inter-node link independently, verify GPU-to-GPU paths, check CPU–GPU–NIC locality, align NIC use with the physical rail design, then test NCCL settings one variable at a time. Finally, examine serving placement and large transfers such as model loading and disaggregated prefill/decode traffic. This method separates a bad route, congested fabric, placement error, and application configuration problem from an actual NCCL defect.
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Start by defining which latency is high
“Inference latency” is an umbrella term. A request can have a normal total response time but an unacceptable delay before its first token, or a normal first token followed by irregular inter-token gaps. A collective operation can be slow while one-to-one network probes look fine. Conversely, a link can show excellent throughput while queueing, retransmissions, or pause behavior create long-tail stalls.
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| Measurement | What it tells you | Typical segmentation |
|---|---|---|
| Time to first token (TTFT) | Delay before streaming begins; affected by request admission, prefill work, queueing, model access, and the first round of distributed communication. | Prompt length, model, concurrency, serving role, and rack or node pair. |
| Inter-token latency (ITL) | Spacing between generated tokens; sensitive to decode synchronization, collective operations, and repeated transfers. | Output length, batch size, decode pool, and placement. |
| Total response latency | End-to-end completion time, including queueing, prefill, decode, and output transfer. | Request size, output size, model, and load level. |
| Point-to-point network latency | Time for a direct message between two endpoints, independent of application-level scheduling. | Message size, node pair, rack path, link layer, and traffic class. |
| Collective latency | Time for all-reduce, all-gather, broadcast, or another synchronized operation. | Payload size, number of ranks, algorithm, topology, and process placement. |
| Tail latency | p95, p99, or another high percentile that exposes occasional queueing, retries, or synchronization stalls. | Rack, switch path, time window, and concurrent traffic. |
Build a symptom matrix
Capture distributions rather than averages. At minimum, record p50, p95, and p99 for TTFT, ITL, and total response time. Add the request’s prompt and output sizes, concurrency, model version, node and rack placement, and whether the request used prefill, decode, cache, or router services. This segmentation is a diagnostic method: it helps reveal whether only cross-rack requests, large prompts, or one serving role is affected.
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- Only p99 is high: investigate congestion, queueing, retries, pause or PFC behavior, and intermittent link degradation before changing NCCL algorithms.
- All percentiles rise with larger messages: compare bandwidth, message-size curves, and the route used by those messages.
- TTFT is high but ITL is normal: inspect admission queues, prefill placement, model-weight or cache transfers, and the first collective.
- ITL is erratic while TTFT is normal: inspect decode synchronization, collective timing, rail alignment, and rank placement.
- Only one rack pair is affected: compare its switch path, optics, port counters, and routing with a healthy pair.
Measure the inter-node link independently
Do not infer latency from a bandwidth number. NVIDIA’s NCCL networking guidance recommends checking the active link, its layer, and its negotiated rate, then measuring throughput and point-to-point latency with separate tools. See NVIDIA’s networking troubleshooting guide and its performance and tuning documentation.
1. Confirm link state and expected rate
On InfiniBand hosts, inspect the active port with ibstat or ibstatus. Confirm that the port is active, the link layer is the one your design expects, and the negotiated rate and width match the installation. A port that silently negotiated a lower width or speed can make every higher-level test misleading.
ibstat
ibstatusFor a hardware-level view of a ConnectX-family port, NVIDIA’s guide lists mlxlink. Use it to check port health, link width, speed, and related physical indicators. Treat a degraded width, repeated link transitions, or an unexpected speed as a fabric issue to repair before tuning NCCL.
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2. Test throughput and point-to-point latency separately
Use ib_write_bw for a controlled throughput comparison and ib_write_lat for point-to-point latency. Run the same message sizes, queue depths, and endpoint pairs on a healthy path and on the suspected path. Keep the traffic pattern documented; a single small-message result cannot explain a large-message collective, and a saturated throughput test can hide queueing behavior.
# On the receiver
ib_write_bw
# On the sender, using the receiver's address
ib_write_bw <receiver-address>
# Point-to-point latency
# Receiver
ib_write_lat
# Sender
ib_write_lat <receiver-address>Use the exact options required by your RDMA distribution, device, and test plan. The important distinction is methodological: bandwidth answers “how much data can this path move under these conditions?” while the latency test answers “how long does a message take?” Neither test alone predicts application p99.
3. Read error, retry, and congestion counters
Increasing RDMA error or retry counters can indicate loss, retries, or a degraded path. NVIDIA recommends rdma statistic and, for InfiniBand, port counters through perfquery. Use ibdiagnet when you need a fabric-wide view of topology and routing rather than a single-host snapshot.
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rdma statistic
perfquery
ibdiagnetFor RoCE, inspect NIC statistics with ethtool -S <interface>. Look for errors, drops, pause frames, and Priority Flow Control (PFC)-related counters. A rise in these counters during the same interval as p99 stalls is stronger evidence than a one-time snapshot. Correlate timestamps with application latency, switch telemetry, and the affected rack pair.
ethtool -S <interface>4. Interpret “healthy bandwidth, bad tail latency” correctly
NVIDIA explicitly warns that bandwidth can appear healthy while tail latency remains poor. High or unstable latency can result from congestion, retransmissions, or a degraded link. If throughput passes but p95 or p99 is unacceptable:
- Repeat the latency test at idle and under representative load.
- Compare the same node pair in both directions where the tool supports it.
- Check retry, error, drop, pause, and PFC counters before and after the test.
- Trace whether the slow requests share a rack, switch, rail, or traffic class.
- Remove or reroute the offending traffic class temporarily, then retest to establish causality.
Verify GPU links and topology before blaming the external fabric
A distributed job can be slow because GPUs are communicating over an unexpected local path, even when the inter-rack network is perfect. NVIDIA recommends inspecting the host topology, confirming peer-to-peer paths, and measuring GPU bandwidth with its topology and bandwidth tools.
1. Inspect the host’s topology matrix
nvidia-smi topo -mUse the matrix to map each GPU to CPU sockets, NUMA nodes, NICs, PCIe switches, and peer links. Record which NIC a rank is expected to use and whether that NIC is physically close to the GPU. A topology label that crosses a socket or PCIe root complex can add transfer overhead or consume a different path than your design assumes.
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nvidia-smi topo -p2p nThis check shows whether the relevant GPU pairs have a direct peer-to-peer path. If a pair falls back to host memory or an indirect route, investigate firmware, driver, IOMMU, PCIe, and platform configuration before changing collectives.
3. Measure GPU-to-GPU bandwidth
Use nvbandwidth or nvloom to test expected GPU-to-GPU paths. NVIDIA notes that multinode profiling requires compiling nvbandwidth with multinode support. Compare local and cross-node results with the RDMA measurements rather than treating either as a complete inference benchmark.
nvbandwidth
nvloomIf local GPU tests and external fabric tests are both healthy but NCCL performance remains poor, investigate NCCL configuration, process placement, and the application’s communication pattern. Do not label the network hardware defective solely because an end-to-end collective is slow.
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Align CPU, memory, GPU, and NIC locality
NVIDIA notes that incorrect process placement can seriously affect performance. Each rank should generally use CPU cores and host memory near its assigned GPU and, for multi-node work, near the NIC that carries its traffic. The exact binding policy depends on the server’s topology and the serving runtime, so verify rather than assume.
Inspect CPU and NUMA layout
lscpu --extended=CPU,NODE,SOCKET,CORECombine this output with nvidia-smi topo -m. Build a map that records, for every rank:
- GPU identifier and its PCIe or NVLink relationships.
- CPU cores and NUMA node used by the process.
- Host-memory policy for allocations.
- NIC and port selected for inter-node traffic.
- Rack, switch, and rail reached by that NIC.
Then inspect NCCL initialization and topology logs to confirm that the runtime selected the paths you intended. If a process is bound to a remote socket, or a rank uses a NIC across a socket boundary while another rank uses a local NIC, fix the launcher, container CPU set, memory policy, or NIC selection before experimenting with algorithm variables.
Symptoms of locality errors
- Large variation between otherwise identical ranks.
- GPU-to-host transfer bandwidth below the platform’s expected path.
- One NIC or CPU socket carrying disproportionate traffic.
- Collective duration that changes when process order changes.
- Stable small-message latency but poor large transfers through a remote PCIe or NUMA path.
Match NIC use to the physical rail design
NCCL’s cross-NIC behavior is topology-dependent. In a rail-optimized design, keeping the same ring or tree on the same NIC or rail can avoid flow interference. When multiple NICs connect to a common switch and do not represent isolated rails, allowing cross-NIC use may be appropriate. NVIDIA documents NCCL_CROSS_NIC=2 as the default in NCCL 2.32.3; that default is not a universal recommendation for every deployment. Read the NCCL environment-variable documentation for the version you actually deploy.
Decide whether you have rails or a shared fabric
| Physical situation | Investigation focus | Potential cross-NIC approach |
|---|---|---|
| NICs are isolated, rail-aligned paths with predictable switch domains. | Keep ranks, rings, trees, and traffic on matching rails; look for cross-rail flows and oversubscription. | Test whether restricting cross-NIC use preserves rail locality. |
| NICs attach to a common switch or shared fabric rather than isolated rails. | Check whether strict rail affinity strands capacity or creates an uneven route. | Test whether allowing cross-NIC use improves balance. |
| Topology is uncertain or has mixed cabling. | Document port-to-switch and port-to-rack connections first; compare counters per NIC. | Do not choose a value from a generic recipe. |
Change one setting at a time, record the NCCL version and topology, and compare both median and tail behavior. A setting that improves a microbenchmark can worsen a real serving workload if it creates additional contention on the path used by cache, router, or model-transfer traffic.
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Treat NCCL tuning as a last-mile experiment
NCCL is tuned for a wide range of systems. NVIDIA’s performance guidance lists knobs covering CTA counts, chunk size, queue pairs per connection, and cross-NIC behavior, while noting that RoCE may require multiple queue pairs for optimal performance. Start with evidence from the link, topology, and placement tests; only then test a narrowly scoped NCCL change.
NVIDIA states: “In general we discourage the use of these variables in production since a tuning gain in one benchmark situation can lead to suboptimal settings elsewhere.” Attribute that warning to the NCCL performance and tuning documentation.
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A safe experiment protocol
- Freeze the baseline. Record NCCL version, driver and firmware versions, GPU model, node and rack pair, process placement, message sizes, concurrency, traffic classes, and the serving workload.
- Choose one hypothesis. For example, “the rail mapping is causing cross-rail contention,” or “RoCE needs more queue pairs for this message pattern.”
- Change one variable. Do not combine CTA, chunk-size, queue-pair, and cross-NIC changes in one run.
- Use representative traffic. Include realistic prompt and output sizes, concurrency, prefill/decode mix, cache activity, and cross-rack placement.
- Compare tails. Report request p50/p95/p99, TTFT, ITL, total response time, collective duration, point-to-point latency, and error or retry counters.
- Revert if the gain is narrow. A faster isolated benchmark is not sufficient if p99, another message size, or another rack pair regresses.
What not to infer from a tuning result
- A better all-reduce time does not prove that user-visible latency improved.
- A lower small-message latency does not establish better large-message throughput.
- A single node-pair result does not establish fabric-wide health.
- A configuration that helps one model or batch size may be harmful for another.
- A successful benchmark under idle conditions does not rule out congestion under serving load.
Evaluate serving topology and high-volume transfers
Fabric settings are only part of a multi-rack inference design. NVIDIA’s Inference Reference Architecture calls out model size, GPU and NIC topology, prefill and decode roles, cache locality, and failure domains. For disaggregated serving, review network design together with placement of prefill pools, decode pools, routers, cache services, and model-weight transfer services.
Map the traffic classes
| Traffic class | Why it can affect latency | Placement question |
|---|---|---|
| Prefill-to-decode handoff | Large activation or state transfers can compete with collectives and increase queueing. | Are prefill and decode pools connected through the intended low-latency path? |
| Decode collectives | Repeated synchronized exchanges make tail stalls visible as inter-token gaps. | Do ranks share the expected rail, NIC, and switch path? |
| KV-cache movement | Cache misses or remote cache access can add variable delay to otherwise identical requests. | Is the cache service near the workers that use it most? |
| Router and control traffic | Admission and routing decisions can add queueing before GPU work starts. | Are routers isolated from bulk transfers and sized for burst behavior? |
| Model-weight transfer | Large transfers during startup, recovery, or scale-out can consume fabric capacity. | Can weights load without contending with latency-sensitive traffic? |
Use separate traffic classes, planes, or scheduled windows only when the platform and network policy support them. RDMA, GPUDirect RDMA, dual-plane networking, and DPU offload are conditional capabilities, not automatic latency improvements. Validate compatibility with the serving stack, drivers, firmware, and failure-domain design.
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- Keep tightly synchronized decode ranks within the intended low-latency domain where capacity permits.
- Place prefill and decode pools according to the volume and size of their handoff traffic, not just GPU count.
- Place cache services close to the workers with the highest cache-read or cache-write volume.
- Keep model-weight distribution from sharing a constrained rail with latency-critical collectives during scale-out.
- Make rack and switch failure domains explicit so a “local” placement does not hide a shared physical dependency.
GB200 multi-node NVLink: a platform-scoped example
NVIDIA’s GB200 NVL multi-node tuning guide describes multiple communication paths between endpoints in the specific NVL5 setting. It states that multi-node NVLink provides the highest bandwidth and lowest latency for large messages in that platform context, with a 900 GB/s unidirectional theoretical maximum. That figure is a hardware bandwidth ceiling, not an inference-latency measurement and not a general ranking of fabrics.
The same guide states that for a very small message such as 1 byte, InfiniBand over CX-7 has lower latency, and identifies a secondary east-west CX-7 InfiniBand network primarily for inter-rack connectivity. These statements apply to the documented GB200/NVL5 architecture; they should not be generalized to unrelated GPU systems, network layouts, or end-to-end serving latency. See NVIDIA’s GB200 NVL multi-node tuning guide.
How to use this example diagnostically
- Identify whether the message is small enough that point-to-point latency dominates or large enough that sustained bandwidth matters.
- Determine whether the communication stays within the NVLink domain or crosses the inter-rack network.
- Measure both paths with the same message-size and concurrency assumptions.
- Do not convert the 900 GB/s theoretical number into a prediction for TTFT, ITL, or p99 response time.
Compare proposed changes with the same evidence
When reviewing a topology change, NIC setting, routing adjustment, or NCCL experiment, use a fixed comparison record. Otherwise, an apparent improvement may simply reflect a different rack pair, message size, load level, or cache state.
| Comparison axis | Record |
|---|---|
| User-visible latency | Request p50, p95, p99; TTFT; ITL; total response time. |
| Communication workload | Message size, operation type, traffic pattern, rank count, and concurrency. |
| Topology | GPU, NIC, CPU, NUMA, PCIe, rail, switch, rack, and inter-rack path. |
| Fabric behavior | Bandwidth, point-to-point latency, queueing, retries, errors, drops, pause frames, and PFC counters. |
| Software state | GPU driver, firmware, NCCL version, runtime, launcher, and environment variables. |
| Serving compatibility | Prefill/decode layout, router and cache placement, model-transfer activity, and failure-domain behavior. |
A practical fault-isolation runbook
Use the following order during an incident or performance investigation. Stop at the first layer that explains the symptom, fix or isolate it, and then retest the complete workload.
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- Segment the requests. Separate models, prompt and output sizes, concurrency, serving roles, rack pairs, and healthy versus affected nodes.
- Check link state. Run
ibstat/ibstatus, verify expected layer, width, and rate, and inspectmlxlinkwhere applicable. - Run independent fabric tests. Compare
ib_write_bwandib_write_laton healthy and affected paths. - Read counters during load. Use
rdma statistic,perfquery,ibdiagnet, orethtool -Saccording to the fabric. - Check GPU paths. Run
nvidia-smi topo -m,nvidia-smi topo -p2p n, and the appropriatenvbandwidth/nvloomtests. - Verify locality. Compare CPU and NUMA placement with GPU and NIC affinity using
lscpu --extended=CPU,NODE,SOCKET,COREand NCCL logs. - Map rails and NIC use. Confirm whether the deployment is rail-optimized or shared-fabric, then test cross-NIC behavior against that physical reality.
- Inspect serving traffic. Check prefill/decode handoffs, cache access, routing, model-weight transfers, and shared failure domains.
- Run one NCCL experiment. Change one variable, use representative inference traffic, and compare tails plus counters.
- Document the accepted configuration. Record the topology, software versions, tested workload, metrics, and rollback setting so a later firmware, driver, or rack change does not erase the evidence.
Common mistakes and their corrections
Changing NCCL variables first
Mistake: applying a tuning recipe before checking link state, counters, and topology. Correction: establish whether the issue is application-specific, hardware-specific, configuration-related, or a possible NCCL performance bug, as NVIDIA advises.
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Using bandwidth as a latency proxy
Mistake: declaring the fabric healthy because a throughput test reaches its expected rate. Correction: measure point-to-point latency and tail behavior under representative load, then correlate retries, drops, pause frames, and PFC counters.
Ignoring local GPU paths
Mistake: blaming the inter-rack fabric when a GPU pair is using an indirect or host-mediated path. Correction: inspect nvidia-smi topo -m and nvidia-smi topo -p2p n, then validate with GPU bandwidth tools.
Binding ranks by CPU count alone
Mistake: assigning equal core counts without considering NUMA and NIC proximity. Correction: bind each rank to cores and memory near its GPU and intended NIC, and verify the result in runtime logs.
Assuming every multi-NIC host has rails
Mistake: forcing strict rail affinity on a shared-switch design, or permitting cross-NIC traffic on isolated rails without measuring the effect. Correction: document the physical cabling and test NCCL_CROSS_NIC behavior against that topology.
Optimizing a microbenchmark instead of the service
Mistake: accepting a lower collective time that increases p99 request latency or harms another message size. Correction: use the production-like prompt, output, concurrency, traffic mix, and rack placement, and keep tail metrics in the acceptance criteria.
What a defensible latency reduction looks like
A defensible improvement has a traceable cause and survives conditions that matter to users. You should be able to state which metric changed, on which path, at what message size and load, with which topology and software versions. The independent link test, GPU-path test, counters, and serving measurements should point in the same direction.
If the evidence instead shows a healthy link, clean counters, correct GPU and NUMA locality, and no rail conflict, stop escalating hardware changes. Focus on the serving schedule, queueing, collective choice, cache and model-transfer placement, or an application-specific communication pattern. If a single rack pair shows degraded width, retries, drops, or unstable latency, repair or isolate that path before tuning software. This order prevents a local hardware fault from being hidden by a configuration change and prevents a benchmark-only gain from becoming a production regression.
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