The Tool Desk
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Why a second source must be qualified before a shortage
A memory part that looks equivalent on a distributor page can differ in density, organization, timing, voltage, package, firmware behavior, endurance or lifecycle status. SK hynix describes memory products as varying by configuration, architecture and performance. Those differences can affect boot training, signal margins, thermal behavior, error correction, performance consistency and field life.
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Waiting until an allocation is missed turns a technical change into an emergency redesign. Failure to qualify alternatives can cause production delays, missed customer deliveries, higher costs, less favorable commercial terms and product re-engineering. A qualification program creates evidence while the incumbent still supplies parts and gives purchasing a defensible point at which to reserve capacity.
The approval unit should be an exact memory configuration in an exact system. “DRAM” or “NAND” is too broad for a release decision. The record should identify the device or module, board revision, controller and firmware combination, operating conditions, acceptance limits and approved manufacturing sites.
#1 Best Overall
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Define the baseline before contacting candidates
Copy the incumbent specification into a controlled baseline. Do not let a candidate’s data sheet redefine the requirement. Record the following for every SK hynix device or module currently approved:
- Capacity and organization: density, memory organization, bus width, rank count, die configuration and ECC or parity scheme.
- Performance: speed bin, timing parameters, command and data rates, latency limits and sustained-performance requirements.
- Electrical limits: nominal and allowable voltages, current limits, power states, inrush behavior and power sequencing.
- Physical fit: package, ball or lead map, dimensions, height restrictions, thermal interface and board footprint. For a module, record connector, keying, rank layout and SPD contents.
- Operating environment: commercial, industrial or automotive temperature grade; humidity, vibration and shock limits; and any altitude or cooling assumptions.
- System dependencies: memory controller, firmware, boot-training algorithms, BIOS or embedded code, device-tree settings, timing tables and power-management policies.
- Reliability targets: refresh and retention limits for DRAM; endurance, retention, read-disturb and power-loss requirements for NAND; plus the intended service life.
- Lifecycle controls: approved-change process, last-time-buy policy, notice periods, traceability fields and the customer’s approved-vendor rules.
For NAND, add the architecture assumptions that are often hidden in a part number: raw NAND or managed device, controller model, firmware version, bad-block policy, over-provisioning, wear-leveling behavior, garbage-collection settings and the endurance profile used by the product. A managed device can be electrically interchangeable yet operationally incompatible if its controller or firmware handles these functions differently.
Set ownership and formal qualification gates
Supplier approval is cross-functional. SK hynix describes selection involving engineering, quality-control and purchasing staff, with attention to both development capability and mass-production capability. Assign one program owner, but require signed decisions from hardware, firmware, systems validation, manufacturing, quality, reliability, procurement and—where applicable—functional safety.
Use stage gates with entry criteria, deliverables, an owner and a disposition for every failure. SK hynix’s quality-design program uses stage-gate development, pre-checklists and technology pre-verification; that model is useful for a second-source change because it prevents an attractive sample from bypassing documentation, reliability or manufacturing evidence.
| Gate | Purpose | Required evidence | Release decision |
|---|---|---|---|
| A — Scope and documentation | Confirm that the candidate can address the frozen configuration. | Executed NDA, complete data sheet, PCN and end-of-life policy, quality certificates, process overview, capacity statement and roadmap. | Reject, hold for missing information, or authorize samples. |
| B — Samples and genealogy | Establish that the tested material is genuine, traceable and representative. | Multiple lots, date and site codes, certificates of conformance, lot genealogy, package and marking details, and incoming inspection plan. | Accept lots for engineering evaluation or quarantine them. |
| C — Platform interoperability | Prove electrical, timing, thermal, power and firmware compatibility in the target system. | Test logs, margin data, stress results, firmware configuration and failure triage records. | Advance, require corrective action, or disqualify. |
| D — Reliability and environment | Show that the part meets life and environmental requirements. | Temperature, voltage, humidity, vibration or shock tests as applicable; accelerated-life data; DRAM retention or NAND endurance and retention results; failure analysis. | Approve reliability evidence or repeat with a defined fix. |
| E — Pilot build | Demonstrate manufacturability and control deviations at production scale. | Controlled build record, yield, rework, programming and test data, operator instructions, deviation log and corrective actions. | Release a limited production quantity or return to engineering. |
| F — Production release | Make the source an approved option with continuing surveillance. | Signed change notice, approved-vendor list entry, purchasing agreement, incoming inspection limits, audit plan and requalification triggers. | Authorize production and ongoing monitoring. |
Screen candidates with a weighted scorecard
Build a long list before a shortage forces a single hurried choice. Require evidence—not marketing claims—of wafer and assembly capacity, technology roadmap, quality-system certification, process-change control, traceability, failure-analysis capability, field-return handling, geographic footprint and financial resilience.
A 2026 HKEX directors’ report describes a TQSCE framework: Technology, Quality, Supply, Cost and ESG. Use those five dimensions as the top-level scorecard, then weight them according to the product’s risk. A high-volume consumer board may weight capacity and cost heavily; a safety-related controller should put quality, traceability and change control first.
Rank #2
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| Dimension | Evidence to score | Questions for the candidate |
|---|---|---|
| Technology | Process node, density roadmap, package and footprint compatibility, controller and firmware ecosystem, speed and temperature options. | Can the supplier make the frozen configuration for the product’s full life? What changes are planned, and how are they notified? |
| Quality | Certification scope, historical parts-per-million data, change control, traceability, reliability reports, corrective-action speed and failure-analysis capability. | Which site makes the material? Can every lot be traced to wafer, assembly and test? What is the escalation path for a field return? |
| Supply | Committed capacity, lead time, allocation priority, geographic concentration, recovery time and site diversification. | What capacity is contractually committed? How is allocation handled during a shortage? How quickly can production recover after a site disruption? |
| Cost | Piece price, qualification engineering, test fixtures, firmware work, yield learning, inventory buffer, revalidation and exit costs. | What is the total change cost, not just the quoted unit price? Which charges recur, and which are one-time? |
| ESG | Audited environmental and labor controls, reporting quality and corrective-action history. | Are controls independently audited, and does the evidence cover wafer, assembly and test locations? |
Score each item against the same evidence rules and record “not established” rather than awarding points for an unsupported claim. A candidate that ranks well commercially but cannot provide lot genealogy or a credible change-notification process should not pass the documentation gate.
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Retail availability can help obtain a physical sample, but it does not prove production qualification. A representative DRAM sample might be described as a “DDR5 ECC RDIMM memory module”; the evaluation still has to match the required speed, rank, capacity, ECC behavior and platform. Prefer samples from the candidate’s intended production site and from more than one lot.
Electrical and timing checks
- Verify all supply rails, sequencing, standby current, active current and power-state transitions against the baseline.
- Measure setup, hold, access and command timing across voltage and temperature corners, not only at room temperature.
- Check speed-bin margin with the production controller, board routing and termination. Record the margin to each acceptance limit.
- Capture power-up, reset and recovery behavior, including brownout and rapid cycling.
Signal integrity and topology
Use the production board and intended routing. Probe clocks, strobes, data eyes and control signals where the design allows, and test the worst-case population of ranks, channels and sockets. A part that passes on a short laboratory interconnect may fail with the actual trace length, connector, thermal solution or module population.
Firmware and interoperability
Run the complete boot and update path. Confirm training or calibration behavior, SPD or identification data, controller initialization, error reporting, ECC correction and uncorrectable-error handling. Test cold boot, warm reset, sleep and wake, firmware update, watchdog recovery and repeated power interruption. If a firmware table or timing parameter must change, treat that software change as part of the qualification scope and regression-test it on every supported board revision.
Thermal and power behavior
Measure temperature at the package or module’s defined hot spot during the product’s sustained workload, not only during a short benchmark. Include maximum ambient temperature, restricted airflow, worst-case voltage and simultaneous operation of neighboring devices. Confirm that throttling, refresh behavior or garbage collection does not violate system performance or safety limits.
Use separate acceptance plans for DRAM and NAND
DRAM and NAND share semiconductor manufacturing concepts, but their failure mechanisms and system interfaces differ. SK hynix notes that NAND is substantially similar to DRAM yet omits the DRAM capacitor step, changing fab-space efficiency, yield risk and turnaround characteristics. That manufacturing distinction is one reason a supplier strong in one memory type is not automatically qualified for the other.
Rank #3
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DRAM-specific plan
- Speed and training margin: exercise every supported speed bin, channel population and rank topology. Record training retries, fallback frequency and boot-time variation.
- Signal integrity: test data-eye or equivalent margin across voltage, temperature and board lots; include connector and module variation where applicable.
- Refresh and retention: run retention checks at temperature extremes and after the specified idle intervals. Verify refresh-rate handling and any self-refresh or low-power mode.
- ECC and parity: inject or simulate correctable and uncorrectable faults where the platform supports it. Confirm logging, scrubbing, containment and reset behavior.
- Thermal stability: stress the highest density and speed combination under the product’s cooling limits, then check error rate and throttling.
- System stability: run long-duration memory tests together with the processor, storage, networking and graphics loads that create the real worst case.
NAND-specific plan
- Controller and firmware compatibility: verify initialization, command timing, queue behavior, firmware update, namespace or partition handling and telemetry.
- Bad-block management: confirm factory bad-block markers, grown-bad-block handling, replacement policy and the host’s response to uncorrectable pages.
- Endurance: apply the product’s actual write mix, block sizes, queue depth and over-provisioning. Report total bytes written or program/erase cycles at the defined failure criterion.
- Retention: age written data at the required temperature and test read-back after the specified storage interval. Include data at different wear levels.
- Read disturb: perform repeated reads on representative blocks and verify that neighboring data remains within the error-correction budget.
- Power-loss protection: interrupt power during writes, metadata updates, garbage collection and wear-leveling. Confirm recovery, atomicity and the absence of silent corruption.
- Sustained performance: measure after the cache is exhausted and during garbage collection, not only during a short burst. Compare latency tails as well as average throughput.
Do not combine DRAM and NAND results into one pass/fail score. Maintain separate test specifications, fixtures, failure limits and reliability reports, even when the same supplier offers both.
Complete reliability, environmental and failure-analysis work
Reliability testing should reproduce the product’s declared environment and life, then add margin appropriate to the risk. Define sample size, lot count, stress duration, read points and failure criteria before testing. A pass is not merely “no visible failure”; it is conformance to the baseline limits with all anomalies dispositioned.
- Use temperature and voltage corners, humidity exposure and thermal cycling where the product environment requires them.
- Add vibration and mechanical shock for equipment that moves or experiences transport stress.
- Run accelerated-life testing with a written acceleration model and confirm that the model applies to the device technology.
- Preserve failed units, test logs, waveforms, firmware versions and lot information for destructive analysis.
- Require a documented root cause and corrective-action plan for every anomalous result; do not close a failure because a later sample passed.
For NAND, correlate endurance and retention results with wear level, temperature and workload. For DRAM, correlate retention, refresh and error behavior with temperature, voltage, rank and topology. These correlations help distinguish a device limitation from a board, controller or firmware interaction.
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Automotive qualification requires more than a commercial temperature grade. SK hynix identifies AEC-Q100, IATF 16949, ASPICE and ISO 26262 in its automotive quality description, and reports ASPICE Level 2 and ISO 26262 functional-safety management work for automotive NAND solutions.
Request evidence that is applicable to the exact device, site and software scope:
- AEC-Q100: qualification results for the device family and package, including the relevant grade and test conditions.
- IATF 16949: quality-system coverage for the manufacturing and support sites involved in the supply chain.
- ASPICE: process evidence for memory-related firmware, drivers or diagnostic software that falls within the project scope.
- ISO 26262: functional-safety management, safety documentation, assumptions of use, diagnostic coverage and change impact for the system’s assigned safety level.
Map each certificate or assessment to the part number and production site. A corporate certificate that excludes the site making your samples is not sufficient evidence for release.
Rank #4
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Contract for continuity, not just price
A technically qualified source can still fail the business requirement if capacity disappears during a market shock. Put continuity terms in the supply agreement or a capacity reservation that procurement, quality and legal teams have approved.
- Capacity: multi-year commitments or reserved capacity, with allocation priority and escalation rules.
- Change control: product-change and process-change notices, defined notice periods, samples and requalification rights before implementation.
- End of life: minimum notice, last-time-buy windows, final-order quantities and support for transition inventory.
- Traceability and audit: lot genealogy, site disclosure, record retention, audit rights and access to failure-analysis information.
- Diversification: geographic and site-diversification commitments where feasible, rather than dependence on one fab, assembly site or logistics lane.
- Recovery: recovery-time targets, shortage communication cadence, alternate logistics options and remedies for missed deliveries.
- Quality obligations: incoming-quality limits, corrective-action response times, warranty terms and notification of regulatory or certification changes.
SK hynix’s offering circular describes multi-year agreements and geographic diversification as ways to reduce interruption risk. Treat those concepts as contract requirements to be verified, not as assumptions about any particular supplier’s availability.
Make the release decision on total cost and risk
Compare the cost of qualifying and maintaining the second source with the cost of an outage. Include engineering labor, new test fixtures, board or socket changes, firmware work, reliability samples, pilot-build scrap, yield learning, buffer inventory, dual-source inspections, periodic requalification and the cost of exiting the source later.
| Cost or risk item | Question to answer before approval |
|---|---|
| Qualification engineering | How many board, firmware, test and reliability hours are required, and which are recurring? |
| Manufacturing impact | Will programming, inspection, test time, yield or rework change with the new part? |
| Inventory and buffers | What safety stock is needed while two sources ramp, and how much could become obsolete? |
| Customer reapproval | Which customers or regulators require their own samples, audits or formal approval? |
| Outage exposure | What revenue, contractual penalty, field-service and redesign costs result if no alternate is ready? |
| Commercial resilience | Are capacity, lead time, allocation and recovery obligations enforceable in the contract? |
A supplier disclosure warns that alternative sources may not be qualified or secured on a timely basis or on commercially reasonable terms because customer qualification requirements are stringent and NAND and DRAM wafers have long lead times. Use that constraint in the schedule: start qualification before the incumbent’s risk becomes an allocation notice.
Operate the source after production release
Approval is the start of surveillance, not the end of qualification. Define incoming inspection by lot, sampling plan, electrical limits and marking checks. Trend parametric data, yield, field returns, corrected-error counts, NAND bad-block growth, retention results and supplier corrective-action response.
Set explicit requalification triggers:
- Any PCN, die revision, process-node change, package or assembly-site change.
- A new wafer, assembly or test location, or a change in subcontractor.
- Material deviation in speed, voltage, temperature grade, firmware or controller behavior.
- Reliability drift, unusual lot-to-lot variation, field-return trend or repeated corrective action.
- Extended supply interruption followed by restart, especially when material has been stored beyond the validated interval.
- Changes to the host board, memory controller, firmware, cooling, workload or safety case.
Keep both sources technically interchangeable only where the baseline proves interchangeability. If one source requires a distinct firmware setting, thermal limit or manufacturing test, encode that difference in the approved configuration rather than relying on tribal knowledge.
Best Value
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Common failure modes and recovery actions
“The part number is close enough.”
Symptom: boot failures, intermittent memory errors or unexplained performance loss appear only on some boards. Recovery: return to the frozen baseline, compare organization, rank, timing, voltage, package and SPD or identification data, then repeat corner testing on production hardware.
“A room-temperature test passed.”
Symptom: failures occur in hot chambers, restricted airflow or low-voltage operation. Recovery: test voltage and temperature corners, measure margin rather than a binary pass, and include the worst-case population and workload.
“NAND endurance was measured with a benchmark.”
Symptom: field performance collapses after cache exhaustion or data is lost during power interruption. Recovery: reproduce the real write mix, over-provisioning, garbage-collection pattern and power-loss points; then inspect wear, retention and metadata recovery.
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Symptom: an audit or customer review finds that the certificate excludes the manufacturing site or software scope used for the samples. Recovery: map every certificate and assessment to the exact part, site, revision and process, and obtain a gap plan before release.
“A second source is approved, but no capacity is reserved.”
Symptom: the supplier is qualified yet cannot deliver during an allocation event. Recovery: negotiate committed capacity, allocation rules, escalation contacts, recovery targets and last-time-buy provisions; then verify them in periodic business reviews.
Quick Recap
Qualification checklist
- Baseline signed for the exact DRAM or NAND configuration and host system.
- Candidate scored on Technology, Quality, Supply, Cost and ESG with evidence attached.
- Samples traceable to intended wafer, assembly and test sites and to multiple lots.
- Electrical, timing, signal-integrity, thermal, power and firmware tests passed on the target platform.
- DRAM and NAND have separate acceptance criteria and reports.
- Environmental, accelerated-life, endurance, retention, read-disturb and power-loss tests passed where applicable.
- Automotive certificates and safety-process evidence mapped to the exact scope when required.
- Pilot build completed with yield, deviations, rework and corrective actions recorded.
- Capacity, change notice, traceability, audit, end-of-life and recovery terms signed.
- Incoming inspection, monitoring and requalification triggers active before production release.
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