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1Scan for outdated or missing drivers - takes under a minute2Clear out junk files and repair common Windows errors3Fix the driver behind crashes, sound loss and screen glitchesPlan an AI fabric from links outward, not from a preferred switch model inward. List every GPU, storage, north-south, support and management link with its speed; choose the topology and failure model; count endpoint and inter-switch links on each plane; then verify that the selected switches, line cards and breakout modes provide those ports with operational headroom. Only after that should you produce a cabling bill of materials that names the module, connector, fiber, polarity, length and reach for every link.
This sequence prevents two expensive mistakes: buying a switch with impressive aggregate bandwidth but too few usable ports, and ordering cables that fit physically but do not match the optics, signaling or breakout arrangement at both ends. Vendor reference architectures are useful worked examples, not universal GPU-to-port ratios.
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Start with a link-and-role inventory
Create a worksheet before comparing switch families. A row should represent one link class, one speed and, where applicable, one fabric plane. Keep compute east-west traffic separate from storage, customer or north-south traffic, support services and out-of-band management even if a converged design eventually carries more than one role over the same physical infrastructure.
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Record the endpoint facts
- Accelerator, server and rack counts, including the planned expansion increment.
- Number of network interfaces per node and whether a stated rate is per NIC, per GPU, per node or an aggregate figure.
- Required rates for GPU compute, storage, customer-facing traffic, support and management.
- Traffic pattern: GPU-to-GPU, rack-local, rack-to-rack, storage-heavy, north-south or a mixture.
- Protocol, operating-system, driver and platform constraints that could limit an optic, cable or switch mode.
- Acceptable oversubscription, service-level objectives, maintenance model and the failure events the fabric must tolerate.
- Rack positions, power feeds, airflow direction, cable pathways, patching space and the date or phase of the next expansion.
Do not convert an aggregate accelerator bandwidth target directly into switch ports. First translate it into physical interfaces and links. A 400 Gb/s interface on a node is one port requirement only if the chosen adapter and switch present it as one 400G connection; a supported breakout may turn one higher-rate port into several lower-rate links.
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Choose the topology before counting ports
Dual-plane fabrics
A dual-plane design builds two independent, equivalent paths. NVIDIA describes its HGX arrangement this way: “A Dual Plane Topology involves building two identical planes that connect to each GPU interface.” In the cited example, an 800 Gb/s GPU interface is divided into two 400 Gb/s links, one into each plane. Both fabrics can carry traffic during normal operation, while a degraded plane can be isolated without removing every path to the endpoint. See the NVIDIA HGX AI Factory physical-topology documentation for the exact architecture and assumptions.
For planning, count the links in each plane independently. Each GPU or adapter connection consumes a port in plane A and another in plane B, and every leaf-to-spine path must be represented in both port ledgers. Power, optics and cable quantities also rise because the second plane is a second physical network, not merely a software setting.
Single-plane fabrics
The same HGX documentation shows a 400 Gb/s single-plane option for workloads that can accept lower network bandwidth in exchange for less infrastructure. It is an architecture-specific trade-off: fewer interfaces and cables can reduce cost and power, but there is no second active plane to preserve connectivity if the first is unavailable. Do not describe the 400G single-plane figure as a general rule for all AI clusters.
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Use a leaf-spine or Clos-style drawing to expose where ports are consumed. Endpoint-facing ports terminate on leaves; leaf-to-spine links consume ports at both ends; and a super-spine tier may be needed as the deployment grows. NVIDIA’s NVL72 guidance adds a super-spine for very large systems and publishes separate component counts for two-, four- and eight-rack configurations. The number of tiers changes cable lengths, uplink counts, failure domains and the number of ports left for growth, so select it before finalizing a switch SKU.
Build an explicit port ledger
Make one row for every role, speed and plane. At minimum, include endpoint ports, uplink ports, inter-switch links at both ends, breakout mapping and planned spares for the chosen failure and growth scenarios. A useful calculation is:
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required ports at a tier = endpoint links + inter-switch links terminating at that tier + reserved operational capacity
For an inter-switch link, count both physical endpoints. If a 400G uplink connects a leaf to a spine, it consumes one 400G-capable port on the leaf and one on the spine. If the design uses a supported 800G-to-two-400G breakout, record the parent port, both child links and the exact optic and cable assembly rather than counting an abstract “800G port.” Keep 400G, 800G and lower rates in separate columns; a switch’s total port number is not a substitute for a speed-specific port count.
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NVIDIA’s 2026 NVL72 network logical architecture illustrates how counts change with scale. Its cited compute-fabric table uses 64-port switches and reports the following configurations:
| System in the reference | Nodes | GPUs | Leaf switches | Spine switches | 400G uplinks per leaf to spine |
|---|---|---|---|---|---|
| Small reference case | 36 | 144 | 8 | 4 | 18 |
| Middle reference case | 72 | 288 | 16 | 8 | 9 |
| Large reference case | 144 | 576 | 32 | 12 | 6 |
These values are tied to NVIDIA’s NVL72 system, software and topology assumptions. They show why a universal “GPUs per switch port” ratio is unsafe: as the reference doubles in size, the leaf count, spine count and uplink distribution change. Copy the method into your worksheet, not the numbers into an unrelated server or NIC design.
Separate active capacity from headroom
After calculating active links, test the ledger against at least three states: normal operation, the loss of a link or switch, and the planned expansion state. Reserve capacity where the selected architecture requires it, but do not apply an unsupported universal spare percentage. NVIDIA’s NVL72 example intentionally leaves some leaf ports unpopulated for balance and headroom. Treat that as a design practice to evaluate, not as a fixed percentage.
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Compare switch radix by usable speed-specific ports
Published radix is meaningful only after you account for the chassis, line cards, port speeds, breakout support, uplinks and the number of tiers. A faceplate connector may be capable of several modes, yet a fully populated configuration can allocate many of those ports to spine links.
As one product-family data point, the Arista 7800R4 AI Spine datasheet reports up to 460 Tb/s of system throughput, up to 576 ports of 800GbE or up to 1,152 ports of 400GbE, with one-, two- or three-tier scaling options. Those are maximum configurations for that family; the usable count depends on the selected chassis and line-card population. Compare the complete port ledger, power and airflow requirements rather than selecting on the headline radix alone.
| Comparison axis | Questions to answer in the design review |
|---|---|
| Bandwidth | What rate is required per accelerator, per node and in aggregate? Is the full rate required on both planes? |
| Resilience | Are planes independent? Can an endpoint, leaf, spine or link fail without losing the required paths? |
| Port efficiency | How many ports remain after uplinks, breakout reservations and the selected line cards are installed? |
| Cabling | Which optics, fiber types, connectors, polarities, lengths and routes are required, and what power do the modules draw? |
| Operations | Can technicians reach and replace modules? Are monitoring, software and expansion increments compatible with the operating model? |
Turn the port ledger into a cabling bill of materials
Every physical link should have a complete record. Use fields for switch-side port type, adapter-side port type, protocol and signaling, transceiver form factor, fiber or copper medium, connector, breakout mode, polarity, length, optical reach and endpoint compatibility. A line such as “800G fiber” is not a purchasable specification.
Connector and module compatibility
NVIDIA’s Quantum, Spectrum and LinkX product documentation shows that switch-side and adapter-side connectors can differ. Its 100G-PAM4 switch examples use twin-port 800G OSFP modules, while adapters may use OSFP or QSFP112 variants depending on the product. The physical shape alone does not establish compatibility: verify the switch port, adapter cage, supported protocol, firmware and the vendor’s compatibility matrix.
The same documentation cautions that 800G and 400G PAM4 devices generally do not downshift to older modulation rates. A module that fits a cage may still fail to establish a link if the signaling generation is wrong. Record the exact part family and supported mode at both ends before ordering.
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Breakout and splitter arrangements
Breakout changes the logical link count and the cable assembly. NVIDIA’s transceiver examples describe twin-port modules that can create two 400G links with two straight fibers, or four 200G links through two supported 1:2 splitter cables. Both ends must support the intended mode, and the twin module’s two ports must use the same type of fiber arrangement. Do not mix a straight connection on one module port with an unsupported splitter arrangement on the other.
Fiber type and reach
The NVIDIA transceiver and fiber documentation lists product-specific examples:
| Example optic or arrangement | Fiber and stated reach | Planning implication |
|---|---|---|
| Twin-port 800G SR4 | Multimode, up to 50 m | Suitable only where the installed route, including service slack, remains within that documented limit. |
| DR4 options | Single-mode, 100 m or 500 m variants | Select the variant from the actual route length and the module’s supported specification. |
| FR4 | Single-mode, up to 2 km | Useful for longer intra-site routes when the switch and adapter support the same optic family. |
| Twin-port breakout examples | Two straight fibers for two 400G links, or two 1:2 splitter cables for four 200G links | Confirm port mapping, fiber arrangement and polarity at both ends. |
These reaches are examples from one product family, not universal Ethernet guarantees. Include connector polish, strand count, polarity and route length in the purchase description. An MPO-12/APC fiber optic cable or breakout assembly can be a valid category for an applicable connection, but it is not a complete specification: match the connector, fiber, polarity, strand arrangement, module and length to the ports you actually selected.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.Check rack density, power and physical routing
A port plan is incomplete until it fits in the rack. Verify the switch’s populated line cards, fan and airflow direction, module power, rack power budget, cable egress, bend radius, overhead or underfloor pathways, patching space and service clearance. High-density optical trunks can block adjacent cages or create bend-radius violations even when the port count is correct.
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Route and label before installation
- Draw the physical route for every link, including vertical transitions, patch panels, slack and the service loop.
- Measure the installed path rather than using straight-line rack distance; add the bend and maintenance allowance required by the cable manufacturer.
- Assign a unique cable ID that identifies plane, source port, destination port, speed, polarity and breakout child where applicable.
- Separate plane A and plane B pathways where the failure model requires physical diversity; do not place both planes in one vulnerable bundle without documenting the risk.
- Validate that labels remain readable after adjacent cables are installed and that technicians can remove a module without disturbing neighboring links.
Validate the design in a repeatable sequence
- Freeze inputs. Sign off the node, accelerator, NIC, storage, north-south, support and management counts, plus per-interface rates and traffic assumptions.
- Draw the topology. Mark each plane, leaf, spine and any super-spine. Identify every endpoint and inter-switch connection.
- Populate the ledger. Count each port at both ends, keep speeds separate and map every breakout parent to its child links.
- Apply failure cases. Recalculate usable paths after a link, switch, plane or power-feed failure according to the availability target.
- Select hardware. Check the chosen chassis and line cards for the required number of usable ports, not merely the advertised aggregate throughput.
- Resolve optics. Confirm module form factor, signaling, protocol, connector, fiber, polarity, breakout mode, length and reach at both endpoints.
- Check the rack. Validate power redundancy, thermal headroom, airflow, cable routing, bend radius and maintenance access.
- Review growth. Verify that the next planned rack or node increment can be added without replacing the initial switches or consuming the resilience reserve.
Common planning failures and their fixes
Using a single accelerator-to-port ratio
Symptom: A design copies one reference’s GPU, leaf or spine ratio into a different server generation. Fix: Rebuild the ledger from the target NIC count, speed, topology and failure model. The NVL72 examples change uplinks per leaf from 18 to 9 to 6 as their scale changes; that is evidence of architecture-specific sizing, not a universal ratio.
Counting connectors instead of usable ports
Symptom: The switch has enough physical cages, but too many are consumed by uplinks, unsupported speeds or a line-card population that differs from the brochure maximum. Fix: Record the exact chassis, line cards, operating mode and ports reserved for each tier before approving the purchase.
Assuming a matching connector means a matching link
Symptom: A module seats mechanically but the link stays down because signaling, firmware, protocol or modulation is incompatible. Fix: Use the vendor compatibility matrix and document both endpoint part families. Do not assume an 800G or 400G PAM4 module will negotiate an older modulation rate.
Ordering a cable without a breakout definition
Symptom: A straight trunk arrives where the design requires a 1:2 splitter, or the child ports map to the wrong lanes. Fix: Specify parent port, child rate and count, splitter or straight arrangement, polarity, strand mapping and both endpoint module types in the bill of materials.
Ignoring the physical route
Symptom: The documented reach is shorter than the installed path, or dense trunks violate bend radius and block service access. Fix: Measure the complete route, select multimode or single-mode accordingly, include service slack and inspect the rack layout before releasing the order.
What a defensible design package contains
Deliver the port ledger, topology diagram, failure-case calculations, switch and line-card configuration, optic compatibility record, cable bill of materials, rack elevation, power and airflow check, labeling scheme and expansion plan together. A reviewer should be able to trace any cable from an accelerator or switch port through its optic and route to the corresponding entry in the topology and failure analysis.
The central decision is not “400G or 800G” in isolation. It is whether the selected speed, topology, radix, breakout mode and physical medium jointly meet the workload bandwidth, availability, rack and growth requirements. Reference architectures from NVIDIA and product data such as the Arista 7800R4 figures provide concrete boundaries for comparison, but the final port and cabling counts belong to the exact endpoints and assumptions in your deployment.
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