Choose quantum hardware by measuring your business workload—not by counting qubits. Define the application and classical baseline, run identical circuits on each candidate, and compare useful success probability, error behavior, compilation overhead, runtime, queue delay, repeatability, security, integration effort, and total cost. For most enterprises, begin with a controlled cloud pilot rather than buying a machine.
What an enterprise hardware evaluation must prove
A credible evaluation answers one question: can this system improve an agreed business outcome at an acceptable cost and risk? The outcome might be solution quality, time to a feasible schedule, energy consumption, or another metric that matters to the business. A processor with more physical qubits can still lose if its errors, connectivity, compiler overhead, queue delays, or operational variability prevent the target circuit from producing useful results.
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Write the decision criteria before contacting vendors. Record the business objective, input-size range, latency target, acceptable error, data sensitivity, regulatory constraints, and the strongest classical alternatives. Establish the classical result first, using fixed hardware and software versions. Without that baseline, a quantum demonstration can show an impressive circuit result without proving business value.
Define the workload precisely
- Problem and output: specify the optimization, simulation, machine-learning, or sampling task and what constitutes a usable answer.
- Scale: list current and expected input sizes, circuit width, depth, repetition count, and any sparse or dense structure.
- Service target: set maximum end-to-end latency, including queue, compilation, execution, and result processing.
- Quality threshold: define acceptable approximation error, probability of returning a feasible solution, or confidence interval.
- Classical comparison: name the algorithm, CPU/GPU configuration, runtime, energy measurement method, and software version used for the baseline.
- Data and governance: classify data, residency requirements, encryption expectations, export-control limits, audit needs, and retention rules.
Use metrics that reflect useful performance
Ask every provider to run the same circuit pack at the same widths and depths. A single-qubit fidelity number or a processor’s maximum qubit count is not an application result. Capture the full path from submitted program to returned answer.
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Application-level measurements
| Metric | What to record | Why it matters |
|---|---|---|
| Useful success probability | Fraction of shots or jobs meeting the business-quality threshold, with confidence intervals | Shows whether output is actionable rather than merely technically valid |
| Approximation or solution quality | Objective value, constraint violations, sampling error, and distance from the classical reference | Allows like-for-like comparison across architectures |
| Shot count | Shots required to reach the agreed confidence level | More shots increase runtime and cost |
| End-to-end runtime | Queue delay, compilation, execution, mitigation, decoding, and post-processing | Business users experience the complete workflow, not gate time alone |
| Compilation overhead | Transpiled width, depth, added two-qubit gates, routing operations, and compile time | Compiler changes can erase nominal hardware advantages |
| Repeatability | Variance across jobs, days, calibrations, and equivalent inputs | Operational stability determines whether a result can be trusted in production |
| Cost per successful result | Provider charges and internal compute divided by jobs that meet the quality target | Price per submitted job can hide failed or repeated work |
System-level metrics
Include a system-level measure such as Quantinuum’s quantum operations per second (QUOPS). QUOPS is intended as an architecture-agnostic benchmark that accounts for effects including error correction, decoding, error mitigation, compilation, and related system behavior—factors isolated gate metrics and qubit count omit. Request the benchmark definition, workload, software versions, and measurement date so that a quoted value is reproducible.
Do not substitute a vendor’s aggregate score for your own workload test. Use it as an additional context metric, then verify whether the same system maintains useful performance at your circuit’s width, depth, shot budget, and quality threshold.
Separate physical qubits from logical capability
A physical qubit is a controllable hardware element. A logical qubit stores encoded quantum information across physical qubits using an error-correction code, so its behavior can be more reliable than any one component when the code and operations work as intended. The two quantities are not interchangeable: one logical qubit may require many physical qubits, and the overhead depends on the code, error rates, decoder, target logical error rate, and operation type.
Questions for current systems
- What physical-qubit count, topology, and usable subset were active during the benchmark?
- How many physical qubits are allocated to each logical qubit at the stated error target?
- What logical error rate was measured, for which logical gate and circuit length?
- Does increasing code distance reduce logical errors as expected, demonstrating threshold behavior?
- What decoder was used, what latency does it add, and can it keep pace with the hardware?
- What logical-gate fidelity, mid-circuit measurement fidelity, and reset performance were demonstrated?
- How much calibration time and hardware capacity are consumed by error-correction experiments?
Interpreting published figures
IBM’s 2026 cloud-anniversary newsroom material reports 156 qubits and a median two-qubit error rate of 1.17E-3 for an IBM Heron r3 processor. Treat those as dated, vendor-reported figures tied to that processor and measurement method; verify the current device specification and benchmark conditions before using them in procurement.
Roadmaps are plans, not capabilities. IBM’s Nighthawk roadmap lists targets of 7,500 gates in 2026, 10,000 in 2027, and 15,000 in 2028. Microsoft has publicised a roadmap target of 1 million reliable quantum operations per second (rQOPS) with an error rate below one in a trillion. These future milestones should remain uncredited in a business case until the supplier demonstrates them on an identified system with a reproducible method and, ideally, independent verification.
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Match hardware characteristics to the circuit
Quantum modalities have different strengths, but no modality wins in the abstract. Evaluate the behavior that your workload actually exercises.
Two-qubit and measurement performance
Two-qubit operations generally contribute more error than single-qubit operations and often dominate a deep algorithm. Request error distributions—not only a median—and test the exact gate combinations used after compilation. Measure readout assignment errors, reset errors, mid-circuit measurement fidelity, and control latency if the algorithm uses feedback or repeated rounds.
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Connectivity and routing
Map the workload’s interaction graph onto the processor. Record the number of inserted swaps or equivalent routing operations, the resulting depth, and the change in success probability. A densely connected device can reduce routing overhead; a device with fewer connections may still win if its native gates and compiler produce lower total error. Compare the transpiled circuits, not diagrams of the uncompiled program.
Coherence, parallelism, and calibration stability
- Coherence: compare relaxation and dephasing behavior against the scheduled circuit duration, including measurement and reset time.
- Parallelism: test simultaneous operations because crosstalk can reduce fidelity when many gates run together.
- Calibration drift: repeat the same circuits on multiple days and after maintenance to reveal changes hidden by a single best-case run.
- Native gate set: determine whether the compiler can express the algorithm efficiently or must decompose operations into long sequences.
- Control latency: measure host-to-device and feedback delays for hybrid algorithms, not just hardware gate duration.
Run a fair proof of concept
Use one benchmark pack and one protocol for every supplier. A fair pilot prevents a provider from selecting a favorable circuit, compiler setting, or calibration window.
- Freeze the specification. Define the application circuit, synthetic scaling cases, regression circuits, input data, quality threshold, shot budget, error-mitigation policy, and classical baseline.
- Freeze software. Record SDK, compiler, transpiler, optimization level, error-mitigation and decoding versions, container image, and operating system. Permit a separate run for a vendor’s recommended settings, but label it separately.
- Freeze classical resources. Use the same CPU/GPU class, thread count, memory limit, solver version, and stopping criteria for every classical comparison.
- Submit identical workloads. Keep circuit width, depth, ordering, shot count, and random seeds fixed where applicable. Export the original and transpiled circuits.
- Measure the complete path. Time queue wait, compilation, submission, execution, mitigation, decoding, and post-processing. Log failed, cancelled, and retried jobs rather than excluding them.
- Repeat over time. Run on multiple days and calibration periods. Report means, distributions, confidence intervals, and the number of observations.
- Calculate business results. Compare quality, latency, energy, and cost per successful result with the classical baseline. A lower raw error rate is not a win if the workflow remains slower or more expensive.
- Document portability. Keep source circuits, intermediate representations, transpiled output, job metadata, and result files so another provider can reproduce the test.
Assess compilers, SDKs, and integration
Software can determine the usable size of a processor. Ask for a transparent compilation path and inspect every transformation that affects error or runtime.
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Integration checklist
- Supported languages, SDK release cadence, API stability, and long-term support policy
- Transpiler controls, native-gate documentation, routing strategy, optimization passes, and reproducible compilation seeds
- Hybrid CPU/GPU orchestration, asynchronous jobs, callbacks, and workflow scheduling
- Mid-circuit measurement, conditional branching, dynamic circuits, parameter sweeps, and batch submission
- Job identifiers, raw counts, calibration metadata, circuit hashes, logs, and export formats
- Emulators and noise models that can run in your continuous-integration and regression systems
- Authentication, role-based access, private networking options, encryption, audit logs, and deletion controls
- Portability of circuits and results if the supplier, processor, or SDK changes
Run your workload through each provider’s documented compiler rather than comparing only vendor-supplied output. Save the before-and-after circuit and quantify added gates, depth, and qubits. If a provider cannot expose enough information to audit those changes, treat that opacity as integration risk.
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For an initial enterprise program, cloud access usually lowers capital risk and allows comparison of multiple processors, emulators, and software stacks. IBM positions its quantum platform as an enterprise-grade cloud service. Azure Quantum documentation describes access to Quantinuum hardware and emulators; its session model can provide exclusive access while jobs are submitted inside a session. These descriptions establish access mechanisms, not a guarantee of throughput or commercial terms.
Contract and operations questions
- What queue-time or availability commitment exists for the specific processor?
- Are quotas, burst limits, maintenance windows, and reservation rules documented?
- What support response times and escalation paths apply to failed or delayed jobs?
- Where are circuit data, inputs, logs, and results stored and processed?
- Can data leave a specified country or legal region, and which subprocessors are involved?
- What export-control, sanctions, and customer-screening restrictions apply?
- How are jobs, calibration records, and logs retained or deleted?
- Can the enterprise retrieve all artifacts in a standard format and move to another provider?
Public sources do not establish comparable enterprise prices, service-level agreements, queue guarantees, or data-residency terms. Obtain those details in current provider contracts and procurement responses. Model recurring access charges, reserved capacity, internal engineering time, classical post-processing, data transfer, failed-job retries, and migration work—not just a per-shot or per-minute price.
Compare candidates on explicit decision axes
After the proof of concept, score only evidence tied to the target workload. A weighted scorecard prevents a spectacular but irrelevant specification from dominating the decision.
| Axis | Evidence to score | Typical decision question |
|---|---|---|
| Application fidelity | Success probability, objective quality, confidence intervals at target depth | Does it meet the business threshold? |
| Scaling | Results across width and depth, failure curve, calibration drift | What happens as the workload grows? |
| Connectivity | Routing operations, added depth, interaction-graph fit | How much overhead does mapping create? |
| Error-correction path | Logical error rates, threshold evidence, decoder speed, physical-to-logical overhead | Is there a credible route to the required reliability? |
| Compiler and SDK | Transpilation transparency, supported features, release stability, reproducibility | Can the team build and maintain the workflow? |
| Access and operations | Queue observations, reservations, maintenance, support, emulator availability | Can production jobs run when needed? |
| Security and governance | Identity, encryption, residency, logging, retention, export controls | Can the workload pass enterprise review? |
| Supplier support | Technical contacts, incident process, roadmap evidence, portability commitments | What happens when hardware or software changes? |
| Total cost | Cloud or ownership costs plus engineering, classical compute, retries, and migration | Is the improvement economically defensible? |
Set weights with the business owner, security team, and engineering team before seeing results. For a latency-sensitive workflow, queue and execution time may outweigh peak fidelity. For a regulated workload, residency and auditability can be a hard gate rather than a weighted preference. Keep a written record of excluded candidates and the evidence supporting each score.
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Build the people and classical platform around the hardware
Hardware access alone does not create enterprise readiness. OECD guidance recommends that organisations access quantum resources, develop the technical infrastructure to use them, and monitor hardware benchmarks, roadmaps, and algorithmic breakthroughs. In practice, assign ownership across quantum algorithm development, classical optimization, platform engineering, security, procurement, and the business domain.
Minimum operating capability
- A source-controlled repository for circuits, compiler configurations, calibration snapshots, and benchmark results
- Automated regression tests against emulators, noise models, and the classical reference implementation
- Data pipelines that validate inputs, capture job metadata, and preserve raw results
- Monitoring for queue delay, failed jobs, drift in success probability, and changes after SDK or processor updates
- Resource estimation that projects shots, logical-qubit overhead, runtime, and classical post-processing at target scale
- A review process that rechecks vendor roadmaps and benchmark definitions whenever a procurement decision is revisited
Common evaluation failures and their remedies
Choosing the largest qubit count
Failure: treating physical-qubit count as capacity for the application. Remedy: compare usable qubits after connectivity, transpilation, error rates, and the quality threshold are applied.
Benchmarking a best-case circuit
Failure: accepting a shallow, hand-tuned demonstration unrelated to production. Remedy: require the provider to run your fixed circuit pack, including scaling and regression cases.
Ignoring the classical baseline
Failure: calling a quantum output successful without measuring the best available classical result. Remedy: freeze a reproducible CPU/GPU baseline and compare end-to-end quality, time, energy, and cost.
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Failure: purchasing against a promised fault-tolerance milestone. Remedy: separate achieved demonstrations from targets and add contractual or technical gates for each future dependency.
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Reporting only average performance
Failure: hiding queue spikes, failed jobs, or calibration drift in a single average. Remedy: publish distributions, confidence intervals, failed-job counts, and results from multiple days.
Leaving governance until deployment
Failure: discovering residency, retention, or export restrictions after a pilot succeeds. Remedy: involve security, legal, and procurement before sending sensitive data and test with representative controls.
When to buy hardware instead of using the cloud
Ownership is justified only when access, latency, governance, or economics cannot be met by a cloud arrangement and the organisation can operate specialized hardware. Require a quantified case covering facility requirements, cryogenic or control infrastructure where applicable, staffing, maintenance, calibration downtime, software support, upgrade path, depreciation, and the opportunity cost of capacity that could be rented. If those numbers are unavailable, a cloud pilot is the lower-risk next step.
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