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How do I design a low-latency Ethernet network for an AI cluster? Start with the workload, not a switch model. Quantify GPU east-west traffic, storage, management and north-south flows; decide which traffic must be isolated; select a topology that delivers the required endpoint and bisection bandwidth; then configure RoCE, congestion control and Priority Flow Control as one tested system across the switch, NIC, firmware, driver and orchestration versions. Leaf-spine or fat-tree Ethernet is a scalable pattern, but no topology, oversubscription ratio or latency target is universal.
The design sequence in one view
A low-latency fabric is an engineered path from application behavior to validated configuration. Use this order:
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- Characterize the workload: list collective communication, HPC message patterns, storage, management and user-facing flows.
- Calculate demand: size endpoint links, simultaneous traffic, growth and acceptable oversubscription at every tier.
- Separate traffic by role: decide which flows need physical fabrics, logical isolation or both.
- Select a topology: map node count and port speeds to leaf, spine and, at very large scale, super-spine capacity.
- Choose a supported stack: match switches, ConnectX or SuperNIC adapters, optics, cabling, firmware, drivers and orchestration releases.
- Configure RoCE as a system: apply the profile intended for the exact reference architecture, including routing, congestion and inter-packet-gap settings.
- Validate under load and failure: test collectives, tail latency, congestion, link loss and recovery before production.
NVIDIA’s reference-architecture material treats bandwidth, traffic separation, topology and management as design tenets rather than afterthoughts. Its guidance is useful evidence for planning, but Spectrum-X recommendations are vendor reference-architecture guidance, not universal rules for every AI or HPC environment. See the design tenets of NVIDIA reference architectures.
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Identify every traffic class
Write down the communications that will run at the same time. Distributed training commonly produces synchronized all-reduce, all-gather and reduce-scatter exchanges between GPUs. HPC applications may use short, latency-sensitive messages, large point-to-point transfers or irregular patterns. Add checkpoint writes, dataset reads, metadata, monitoring, provisioning, remote access and user-facing services. A fabric sized only for GPU collectives can still stall when storage or management traffic shares its queues.
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- GPU east-west: node-to-node traffic generated by training, inference parallelism and HPC jobs.
- Storage: dataset, checkpoint and scratch traffic to file, object or block systems.
- Management: provisioning, telemetry, control-plane protocols and out-of-band administration.
- North-south: traffic between the cluster and users, data services, schedulers or external applications.
Turn application behavior into link demand
For each class, record endpoint count, adapter rate, expected concurrent senders, burst size, communication pattern and growth horizon. Estimate the traffic generated by one node, then multiply by the number of nodes that can communicate simultaneously. Compare that offered load with the usable capacity of every uplink and spine path, not merely the nominal port rate.
Define an explicit oversubscription policy at the node-to-leaf, leaf-to-spine and, where present, spine-to-super-spine tiers. The reviewed NVIDIA material does not establish a universal ratio or latency target; those values must come from your workload and representative tests. Document whether the requirement is average latency, a percentile such as p99, completion time for a collective, or sustained throughput during a checkpoint.
Account for growth and failure
Size for the planned node count plus the next expansion step. State how many links or switches may be unavailable while the remaining fabric still meets the service objective. A design that is nonblocking at day one may become oversubscribed after adding racks, changing port breakout or reserving capacity for maintenance. Keep a port and power budget for spare links, optics and replacement hardware.
2. Separate GPU traffic from other roles
Why east-west traffic deserves special treatment
Collectives can synchronize thousands of endpoints. A pause, queue buildup or retransmission on one path can delay an entire operation, so east-west performance is often more sensitive than ordinary enterprise Ethernet traffic. NVIDIA AI Factory guidance describes isolated GPU compute networks and identifies east-west networking as critical to distributed training and inference. Read the reference-architecture design tenets and the NVL72 network logical architecture for those platform-specific patterns.
Choose physical, logical or combined isolation
- Separate physical fabric: dedicated switches, adapters or links for GPU east-west traffic. This gives the clearest fault and congestion boundary, at the cost of additional hardware, optics, cabling and operations.
- Logical separation: VLANs, virtual networks, traffic classes and access controls on a shared physical fabric. It uses ports efficiently, but a shared failure domain and shared queues still need careful capacity and policy design.
- Combined design: a dedicated GPU fabric plus shared or separate networks for storage, management and north-south services. This is common when collective traffic has strict performance objectives while other services have different availability or security requirements.
Do not assume that a dedicated network automatically solves congestion. Storage bursts, misclassified packets or an incorrect priority map can still affect the GPU class. Document which interfaces, VLANs, virtual functions and routing domains carry each role, and enforce the choice in host configuration and switch policy.
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3. Select a topology that scales predictably
Leaf-spine and fat-tree
A leaf-spine or fat-tree fabric gives endpoints multiple, predictable paths and lets you add capacity by increasing leaf uplinks or spine count. NVIDIA’s RTX PRO AI Factory design describes a full nonblocking Spectrum-X fabric with rail-optimized GPU connectivity. That is an example tied to the named platform and scale; it is not proof that every cluster needs the same switch family or a fully nonblocking design. Review the RTX PRO network logical architecture.
“Nonblocking” must be demonstrated with your port map. Calculate the aggregate downlink bandwidth presented by each leaf, the uplink bandwidth to spines, the number of equal-cost paths and the intended bisection bandwidth. Include endpoint oversubscription, port breakout, reserved capacity and the effect of a failed link or device.
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| Pattern | Use and engineering question | Important qualification |
|---|---|---|
| Leaf-spine or fat-tree | Use for a scalable east-west fabric with predictable paths. Check leaf downlinks, spine uplinks, equal-cost paths and bisection bandwidth. | Scalability depends on port count, speed, uplink count and growth plan; the topology alone does not guarantee low latency. |
| Full nonblocking fabric | Use when the workload requires the fabric’s designed downlink capacity to be available across the intended paths. | The RTX PRO example is a Spectrum-X reference architecture, not a universal requirement. |
| Super-spine extension | Use when a two-tier fabric no longer provides the required scale or path capacity. | The NVL72 architecture discusses a super-spine at around 1,024 nodes and above; that threshold belongs to that design and is not a general industry rule. |
Rail- and placement-aware design
When a server has multiple GPU-facing network interfaces, map each interface consistently to the intended leaf and spine paths. Rail-aware placement can reduce contention and preserve parallelism, but the mapping must match the host’s GPU topology, adapter enumeration, cabling and software assumptions. Record the mapping in a rack diagram and in automation so that a replacement cable or NIC does not silently change traffic locality.
When a super-spine is justified
At very large scale, adding more spines to a two-tier fabric can exhaust ports, racks or path-management capacity. The NVIDIA NVL72 network architecture describes introducing a super-spine around 1,024 nodes and above. Treat this as a design-specific reference point: calculate your own port, bisection, rack, power and failure-domain limits before adding a tier.
4. Select hardware and verify the supported stack
Build a compatibility bill of materials
The platform components named in NVIDIA’s Spectrum-X material include Spectrum switches, ConnectX NIC or SuperNIC families and BlueField-3 SuperNICs. The Spectrum-X platform documentation places Spectrum switches in its reference fabric. These are component categories, not a universal bill of materials for every cluster.
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| Layer | What to verify |
|---|---|
| Switches | Port speed and count, buffer behavior, breakout modes, supported routing and congestion features, telemetry, optics and the target topology. |
| NICs and SuperNICs | Endpoint rate, RoCE capabilities, virtual-function model, firmware support, driver and OFED release, CPU or GPU affinity and host interface layout. |
| Optics and cabling | Reach, connector and lane type, link speed, breakout compatibility, transceiver coding and validated interoperability for the selected switch and adapter. |
| Software | Switch NOS, NIC firmware, kernel driver, OFED package, Network Operator release, orchestration version and the exact reference-architecture profile. |
Freeze a tested combination in a configuration matrix. Record firmware and driver checksums, switch image, Kubernetes or orchestration version, profile name, cable part numbers and the date of validation. A later upgrade to one layer can alter queueing, PFC, adaptive routing or telemetry behavior even when the hardware is unchanged.
5. Configure RoCE and congestion control as one system
Use the profile for the exact architecture
RoCE performance depends on coordinated host and fabric settings. NVIDIA’s Network Operator 26.7 Spectrum-X documentation describes a profile that covers RoCE, adaptive routing, congestion control and inter-packet gap. For the described Spectrum-X optimization, it requires Ethernet link type and a single virtual function. Follow the profile associated with the supported reference architecture in the Spectrum-X NIC configuration documentation.
Do not copy values from that profile into a different NIC, switch, firmware or orchestration release without confirmation. Record which settings are applied on hosts, which are applied on switches and which are controlled by the operator. Verify that the running state matches the intended profile rather than trusting a deployment manifest alone.
Understand what PFC does
Priority Flow Control, defined by IEEE 802.1Qbb, pauses selected traffic classes instead of pausing every class on a link. NVIDIA’s MLNX_OFED documentation gives an example in which RoCE traffic receives lossless treatment while ordinary Ethernet traffic remains best effort. See the Priority Flow Control documentation, version 24.10 LTS Update 2.
PFC is therefore a traffic-class mechanism, not a complete network design. You still need a consistent priority classification, queue mapping, pause propagation policy, buffer thresholds, congestion-control behavior and failure response from the application host to the destination. The cited documentation does not establish one universal priority number, threshold set or tuning recipe for all fabrics.
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Prevent pause storms and deadlock
- Classify only the traffic that requires the intended lossless behavior; leaving every class lossless increases blast radius.
- Make the priority code point, VLAN priority, switch queue and host traffic class agree at every hop.
- Check that pause frames are visible on the expected class and absent from best-effort classes during controlled congestion.
- Confirm that congestion-control feedback, adaptive routing and PFC are not fighting each other through incompatible thresholds or disabled counters.
- Test a failed link, unreachable receiver and oversubscribed destination so a pause condition does not spread indefinitely.
6. A practical implementation procedure
- Create a traffic and node inventory. List GPU count per node, adapter count and speed, storage endpoints, management paths, user services, job concurrency and expected growth.
- Write service objectives. Specify sustained throughput, collective completion time, acceptable average and tail latency, recovery time after a link failure and the traffic that may be oversubscribed.
- Draw the physical and logical maps. Show racks, leaves, spines, optional super-spines, endpoint rails, VLANs or virtual networks, routing domains and management access.
- Run the capacity calculation. For every tier, compare offered load with aggregate link capacity under normal operation, one-link loss and one-device maintenance. Include storage and north-south bursts.
- Choose the supported hardware stack. Confirm switch and adapter feature support, optics and cabling, firmware, driver, OFED and Network Operator versions before placing an order.
- Apply the reference profile. Configure Ethernet link type, the required virtual-function model, RoCE, adaptive routing, congestion control and inter-packet gap according to the release-specific documentation.
- Implement traffic classes. Map RoCE to the intended lossless class, keep ordinary Ethernet best effort where required, and apply matching host and switch policies.
- Instrument the fabric. Collect interface errors, discards, pause frames by priority, queue occupancy, congestion marks, retransmissions, link flaps and route changes. Keep synchronized timestamps for hosts and switches.
- Run isolated tests. Verify link negotiation, MTU, addressing, routing, rail-to-GPU affinity and per-class counters before introducing application traffic.
- Run mixed-workload and failure tests. Combine collectives with storage and management bursts, then remove links or devices and observe throughput, tail latency, pause behavior and recovery.
- Gate production on evidence. Save test commands, workload versions, node placement, firmware, driver, profile and counter snapshots so a later change can be compared with the baseline.
7. Validate latency and throughput under realistic load
Measure distributions, not just link rate
Average latency can conceal queueing that makes a synchronized job wait. Report median and tail latency, collective completion time, sustained throughput, short-message latency and retransmission or retry behavior. Run enough repetitions to distinguish a stable result from a warm-cache or idle-fabric result.
NVIDIA’s ecosystem architecture material discusses tail latency and intended performance goals, but no independent, generalizable benchmark with comparable workloads and methods was identified for all vendors. Treat vendor performance positioning as a vendor claim and publish your own test conditions when comparing designs. See the Enterprise AI Factory ecosystem architecture.
Test the traffic mix you will actually run
- Collective test: use the planned node count and GPU placement, not a small subset that avoids the production topology.
- HPC message test: include the small messages and synchronization frequency that drive latency sensitivity.
- Storage-concurrency test: run reads or checkpoint writes while collectives are active.
- North-south burst test: generate user or service traffic at the expected ingress and egress points.
- Failure test: disable a link, leaf path or endpoint and verify rerouting, pause containment and application recovery.
Define pass and fail conditions in advance
A useful acceptance record states the workload, node placement, packet size, concurrency, duration, fabric state, firmware and software versions, measured throughput, latency percentiles, pause counters, congestion marks, errors and recovery time. Do not declare success because every interface reports its nominal speed; the application-level result is the acceptance criterion.
8. Troubleshoot common failure modes
High latency despite idle average utilization
Look for microbursts, a single oversubscribed uplink, uneven rail placement, queue buildup or a failed equal-cost path. Check per-queue occupancy and tail latency during the application event rather than relying on five-minute interface averages. Confirm that all intended paths are installed and that a link flap has not reduced the available bisection bandwidth.
RoCE throughput is lower than expected
Verify Ethernet link type, virtual-function count, MTU, adapter firmware, driver and OFED release, then compare the running host and switch settings with the release-specific Spectrum-X profile. Check for retransmissions, congestion marks, pause frames and link errors. A mismatch between the profile and the installed hardware can produce a healthy link with poor application throughput.
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Pause frames appear on ordinary Ethernet traffic
Inspect classification and queue mapping at every hop. A priority-code-point rewrite, VLAN translation or host mapping error can place best-effort packets in the lossless class. Restore the intended selective PFC policy, then repeat a controlled congestion test and verify counters separately for RoCE and ordinary Ethernet.
Congestion spreads across the fabric
Trace pause propagation from the blocked receiver toward the sender. Check whether too many classes have PFC enabled, thresholds are too aggressive, or congestion-control feedback is disabled or inconsistent. Isolate the affected class, confirm buffer and queue behavior, and test the failure case again before returning the network to production.
Performance changes after an upgrade
Compare the full compatibility matrix, not only the changed package. Switch image, NIC firmware, host driver, OFED, Network Operator and orchestration releases can change defaults and supported profiles. Roll back to the last validated combination or apply the new release’s documented profile, then rerun the baseline workload and failure tests.
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When evaluating two fabrics, score both against identical workloads and failure assumptions. The relevant questions are:
| Axis | What to compare |
|---|---|
| Endpoint and bisection bandwidth | Usable adapter capacity, aggregate capacity between halves of the cluster and capacity after a planned failure. |
| Oversubscription | Downlink-to-uplink ratios at each tier during normal operation, growth and maintenance. |
| Latency | Average and tail latency under representative collective, HPC, storage and mixed traffic. |
| Congestion behavior | Pause scope, congestion marks, retransmission or retry behavior and time to recover. |
| Fault isolation | Whether a bad endpoint, queue, link or switch can affect unrelated traffic classes and racks. |
| Scale | Available ports, rack growth, optics and cabling plan, routing scale and the point at which another tier is required. |
| End-to-end support | Documented compatibility across switch, NIC, firmware, driver, orchestration and the selected RoCE profile. |
Do not assign a universal numeric winner without publishing the workload, packet sizes, concurrency, software versions and failure conditions behind the result. A design that wins a bandwidth test can lose on tail latency, recoverability or operational complexity.
What “low latency” means for an AI or HPC fabric
Low latency is an application outcome, not a switch label. For a synchronized collective, the slowest participant and the tail of the latency distribution can dominate job time. For HPC, small-message response and jitter may matter more than bulk throughput. For checkpointing, sustained bandwidth and queue isolation may matter more than single-message latency. Set objectives per workload, then validate them with the same node count, placement and traffic mix used in production.
Quick Recap
Final design checklist
- Workload classes, node count, endpoint rates, concurrency and growth are documented.
- GPU east-west, storage, management and north-south paths are explicitly separated or intentionally shared.
- Leaf, spine and optional super-spine capacity is calculated for normal operation and failures.
- Rail placement, port breakout, optics, cabling and rack diagrams match host topology.
- Switch, NIC or SuperNIC, firmware, driver, OFED and orchestration versions form a tested support matrix.
- RoCE, adaptive routing, congestion control and inter-packet gap use the profile for the exact supported architecture.
- PFC is enabled only for the intended traffic class, with matching classification and queue mapping end to end.
- Monitoring captures queue, pause, congestion, retransmission, error and route-change counters.
- Representative collectives, HPC messages, storage bursts, mixed traffic and failure scenarios pass defined thresholds.
- Every production change triggers a repeat of the relevant baseline and failure tests.
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