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When high-bandwidth memory (HBM) is difficult to source, keep two separate questions in view: how much memory each device exposes and how quickly that memory can feed the workload. Shortlist products from their specifications, but make the final choice with a representative benchmark using your model, precision, context, batch or concurrency and deployment topology.
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Start with the memory your workload can actually use
GPU memory capacity determines whether model weights, intermediate tensors and runtime state fit on a device. Bandwidth determines how quickly data can move once it is there. They are related, but neither substitutes for the other.
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For inference, the allocation normally includes model weights, temporary buffers, framework and kernel workspaces, and the key-value (KV) cache used by transformer attention. The KV cache grows with sequence length and concurrent requests, so a model that fits for a short single request can run out of memory at a longer context or higher concurrency. For training, add forward activations saved for back-propagation, gradients, optimizer state and checkpointing buffers. Parameter count alone is not a capacity estimate.
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Use a peak-memory target rather than the nominal model size. Leave headroom for allocator fragmentation, CUDA or ROCm runtime allocations, communication buffers and traffic spikes. The exact overhead depends on the framework, kernels, precision, sequence length, batch size and parallelism strategy, so a sizing calculation must be checked with a representative run.
A useful first-pass calculation
Weight storage is approximately the parameter count multiplied by bytes per parameter. A 70-billion-parameter model therefore needs about 140 GB just for 16-bit weights, about 70 GB at 8-bit and about 35 GB at 4-bit, before scales, metadata, runtime buffers or KV cache. These are arithmetic estimates, not promises that a particular quantized implementation will use exactly those amounts. Training generally needs substantially more because gradients, activations and optimizer state are also resident.
| Workload element | Why it consumes memory | What to record when sizing |
|---|---|---|
| Weights | Parameters for the selected checkpoint and precision | Parameter count, data type, quantization format and sharding |
| KV cache | Per-token attention state retained during generation | Context length, number of simultaneous sequences and cache precision |
| Activations | Intermediate values saved for backward passes during training | Batch size, sequence length, activation checkpointing and model architecture |
| Gradients and optimizer state | Training updates require additional copies and optimizer statistics | Optimizer, precision and whether states are partitioned or offloaded |
| Runtime and workspace | Framework allocators, kernels, communication and temporary tensors | Framework version, libraries, parallelism and measured peak allocation |
Capacity and bandwidth answer different questions
Capacity answers “can the complete working set fit on this device?” Bandwidth answers “how quickly can a memory-bound kernel read and write that working set?” Large language model decoding, embedding, recommendation and many HPC kernels can become bandwidth-limited, but compute, synchronization, cache behavior and kernel efficiency can dominate other phases.
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Current HBM options and non-HBM alternatives
The following figures are vendor specifications for named configurations. They are useful for capacity and bandwidth screening, but they do not constitute an independent ranking.
| Accelerator or configuration | Memory per GPU | Advertised memory bandwidth | Source and qualification |
|---|---|---|---|
| NVIDIA H100 SXM | 80 GB HBM3 | 3.35 TB/s | NVIDIA HGX component documentation for the SXM configuration, accessed 2026 |
| NVIDIA H200 SXM | 141 GB HBM3e | 4.8 TB/s | NVIDIA HGX component documentation; the H200 product page also lists 141 GB and 4.8 TB/s |
| NVIDIA B200 SXM | 180 GB HBM3e | Up to 8 TB/s | NVIDIA HGX component documentation for the named SXM configuration |
| AMD Instinct MI300X | 192 GB HBM3 | 5.3 TB/s peak theoretical | AMD announcement published December 6, 2023; per accelerator |
| NVIDIA RTX 5090 | 32 GB GDDR7 | Not stated in the cited catalog entry | NVIDIA Brev GPU catalog, last updated April 6, 2026; non-HBM desktop-class option |
| NVIDIA RTX PRO Server 6000 | 96 GB GDDR7 | Not stated in the cited catalog entry | NVIDIA Brev GPU catalog, last updated April 6, 2026; non-HBM server option |
For the underlying H100, H200 and B200 specifications, see NVIDIA’s HGX component table. AMD lists the MI300X figures in its December 6, 2023 announcement. The H200 product page is at NVIDIA’s H200 Tensor Core GPU page, and the GDDR catalog entries are in NVIDIA Brev’s GPU Types documentation.
GDDR alternatives can be practical for smaller models, development and local inference when 32 or 96 GB is sufficient. Capacity alone does not establish equivalent bandwidth, interconnect, cooling, server qualification or data-center performance. Treat them as different deployment classes rather than direct replacements for large-memory HBM accelerators.
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Do not mistake aggregate node memory for one large GPU
An eight-GPU node can advertise an impressive combined memory total, but that memory is distributed. NVIDIA’s HGX table lists 640 GB HBM3 and 26.8 TB/s aggregate GPU bandwidth for an eight-H100 node, 1.1 TB HBM3e and 38.4 TB/s for eight H200 GPUs, and 1.44 TB HBM3e with up to 64 TB/s for eight B200 GPUs. Those totals are sums across eight devices, not one contiguous allocation visible to an arbitrary process.
The same documentation lists GPU-to-GPU bandwidth of 900 GB/s for HGX H100 and H200 systems and 1,800 GB/s for B200 systems, using NVLink and NVSwitch topology. These are system specifications; an application may achieve less because of collectives, message sizes, software efficiency, PCIe paths, host traffic or contention. Confirm the topology of the exact server SKU.
To use aggregate capacity, the model or runtime must support tensor, pipeline, expert or data parallelism, or another sharding method. Every shard introduces communication and scheduling requirements. A model that barely fits after sharding may still miss a latency target if GPUs spend too much time exchanging activations or synchronizing gradients.
MI300X partitioning is not extra physical memory
AMD’s MI300X guide describes 192 GB of unified HBM and compute or memory partitioning that can expose resources as logical devices. Partitioning can improve scheduling and isolation, but it changes how the physical resources are presented; it does not enlarge the 192 GB pool. Read the MI300X GPU Partitioning Overview alongside the runtime’s device-placement documentation before assuming a partition can hold a larger model.
Check software fit before buying hardware
A specification sheet cannot tell you whether your exact model path will run efficiently. Confirm all of the following for the intended operating system and driver or runtime release:
- Framework support for the specific GPU architecture and version, including PyTorch, TensorFlow or the serving framework you plan to use.
- Kernel and library coverage for attention, normalization, quantization, matrix multiplication, communication collectives and fused operations.
- Precision support for FP32, BF16, FP16, FP8 or the selected integer format, including accumulation behavior and numerical stability.
- Checkpoint loading, tokenizer, sharding and distributed-launch support for the model family.
- Container images, driver compatibility, monitoring and profiling tools that are qualified for the exact SKU.
AMD’s MI300X announcement identifies ROCm, PyTorch, TensorFlow, Hugging Face and other ecosystem tools as supported targets. That establishes ecosystem intent, not equal support for every model, kernel or release. Test the precise framework and kernel versions you will deploy.
A repeatable GPU-selection workflow
1. Define the service or training objective
Write down the model and checkpoint, training or inference, precision or quantization, maximum context, batch size or request concurrency, target throughput, acceptable tail latency and uptime requirement. For training, include optimizer, activation-checkpointing policy and checkpoint frequency. For inference, record prompt and generated-token distributions because KV-cache demand follows actual sequence lengths.
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2. Measure a realistic memory peak
- Load the real checkpoint with the intended precision and tokenizer.
- Run representative prompts or training batches at the maximum context and concurrency you intend to support.
- Record peak device allocation, reserved memory, KV-cache growth, temporary workspace and communication buffers.
- Set a headroom target for fragmentation, rolling upgrades and traffic variation rather than treating the measured peak as a safe limit.
If you cannot run the full model yet, calculate a conservative estimate from weights and known runtime components, then validate it on a smaller equivalent configuration. Do not use parameter count alone.
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If the complete working set fits on one device with headroom, compare candidates by measured throughput, latency, power and cost at that device count. Single-device placement removes inter-GPU synchronization and usually simplifies serving. A larger-memory accelerator can therefore be faster operationally even when a cheaper set of smaller GPUs has a higher aggregate memory total.
4. Evaluate ways to make an oversized model fit
- Quantization: reduces weight and sometimes cache memory, but can change quality, calibration requirements and kernel availability.
- Smaller batches or context: lowers peak memory and often lowers throughput or user-visible context.
- Offload: moves weights, cache or optimizer state to host memory or storage; it can avoid an out-of-memory error but adds transfer latency and host-memory requirements.
- Sharding: distributes the model across GPUs; it requires compatible software and a topology that can sustain the communication pattern.
Benchmark each option against quality and service objectives. A configuration that technically loads is not successful if it misses latency, throughput or accuracy requirements.
5. Validate a multi-GPU topology
Check GPU-to-GPU links, switch placement, PCIe layout, host-memory bandwidth, network adapters and fabric for cross-node jobs. Verify that the framework’s collective operations use the fast path rather than silently routing through the host. Measure scaling efficiency from one GPU to two, four and the planned production count; aggregate bandwidth figures do not guarantee linear scaling.
6. Benchmark the end-to-end stack
Use the production checkpoint, precision, context and concurrency. Record steady-state throughput, first-token latency, per-token latency, tail latency, utilization, peak memory, power and scaling efficiency. For training, record samples or tokens per second, step time, convergence behavior and checkpoint overhead. Vendor speedup claims are workload-specific; NVIDIA’s H200 page, for example, presents comparative figures for stated generative-AI and HPC workloads, not universal head-to-head results.
7. Confirm the delivered system
Before procurement, validate the exact server or cloud SKU, GPU count, interconnect, host RAM, network fabric, power budget, cooling, chassis form factor, driver image, region and recurring price. Availability can differ between a reference accelerator and a qualified system. A nominally suitable GPU that cannot be supplied in the required topology is not a usable option.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.How to reason about a 70B model
A 70B model needs roughly 140 GB for 16-bit weights before runtime overhead, so an 80 GB H100 cannot hold those weights on one device at that precision. A 141 GB H200 or 180 GB B200 is closer to the weight-capacity requirement, but KV cache, framework workspace and headroom still have to fit; whether it works depends on context, concurrency and implementation. The 192 GB MI300X provides more nominal capacity, yet the same runtime variables apply.
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At 8-bit, the arithmetic weight estimate is about 70 GB; at 4-bit, about 35 GB. Quantization metadata, scales, activations, cache and kernels consume additional memory, and quality may change. Consequently, a 32 GB device is not automatically sufficient for a 4-bit 70B deployment, while a multi-GPU arrangement may be needed even when the arithmetic weight total appears below the node’s aggregate capacity.
Deployment, power and cost are part of GPU choice
Compare the complete delivered system or cloud instance, not only the accelerator’s purchase price. Include server qualification, chassis space, power delivery, cooling, networking, storage, support and utilization. An accelerator with higher peak bandwidth can cost more to operate if the workload is compute-bound or if the software stack leaves it underutilized.
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For cloud deployment, compare the exact instance type and region, attached host memory, interconnect, hourly or reserved pricing, quota and availability. For owned hardware, confirm that the power and thermal design supports the sustained workload rather than a short benchmark run. A smaller number of large-memory GPUs can simplify orchestration, while more smaller GPUs may improve availability or provide better parallel throughput when the software scales efficiently.
Common selection mistakes and fixes
Counting every gigabyte as pooled VRAM
Symptom: the model fits on paper using the sum of several GPUs but fails during allocation. Fix: map the model to an explicit sharding strategy and reserve memory on each device; verify placement with the framework’s memory report.
Choosing bandwidth before capacity
Symptom: a high-bandwidth card still reports out-of-memory errors. Fix: solve per-device capacity and headroom first, then measure whether the workload is actually bandwidth-bound.
Using training assumptions for inference, or vice versa
Symptom: a model loads for inference but training fails, or a training estimate overstates serving needs. Fix: budget the components specific to the mode: activations, gradients and optimizer state for training; KV cache and concurrency for generation.
Trusting peak specifications as delivered performance
Symptom: production throughput is far below the advertised figure. Fix: reproduce the workload with the same precision, context, batch, software and topology, and inspect utilization and communication time.
Ignoring software and SKU details
Symptom: a supported architecture lacks a working kernel, container or driver for the chosen model. Fix: test the exact GPU, framework, runtime and model release in a staging environment before ordering a fleet.
A practical decision rule
Choose the smallest, most available configuration that satisfies measured memory headroom and service targets. Prefer one GPU when it fits and avoids expensive synchronization. Move to multiple GPUs when capacity, throughput or availability requires it, but budget for sharding complexity and interconnect performance. Use bandwidth to break ties among configurations that already fit, and use end-to-end benchmarks—not peak FLOPS or aggregate memory alone—to make the final decision.
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