A silicon quantum processor stores information in the spin of an electron trapped in a nanoscale silicon quantum dot. Electrostatic gates create and tune the dot, microwave or electrical pulses rotate the spin, exchange coupling entangles neighboring spins, and a charge sensor converts the final quantum state into a classical bit. The device must operate in a cryogenic environment, and practical machines will need quantum-error-correction codes that spread one logical qubit across many physical qubits.
Recent experiments show high-fidelity one- and two-qubit operations, including operation above 1 kelvin and fabrication on 300 mm silicon wafers. Those are important engineering milestones, not yet a commercial, fault-tolerant quantum computer.
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What a silicon quantum processor is
A silicon spin processor is a nanoscale array of quantum dots. Each dot confines an individual electron, much as a transistor controls charge in an ordinary integrated circuit. In the quantum device, the electron’s spin provides the information carrier: one orientation is designated |0> and the opposite orientation |1>. A controlled quantum state can be a superposition of both basis states until measurement.
The silicon host is more than passive scaffolding. Isotopically enriched silicon can greatly reduce magnetic noise from silicon-29 nuclei, while silicon’s small device dimensions and established complementary metal-oxide-semiconductor (CMOS) manufacturing processes offer a path to dense arrays. The challenge is to preserve quantum behavior while providing the wiring, control electronics, calibration and measurement needed for a large classical system.
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How a silicon spin qubit is built
Quantum dots confine the electron
Metallic electrodes above or beside the silicon form an electrostatic potential landscape. By changing the voltage on these gates, engineers define a dot, load a chosen number of electrons, and tune the electron’s energy. Adjacent dots can be brought closer in energy or wave-function overlap so that their spins interact.
A common test structure is a silicon metal-oxide-semiconductor (SiMOS) double dot. It contains two neighboring confinement regions, each holding a spin qubit, plus gates that control the tunnel barrier and the interaction between the dots.
Spin is the physical encoding
The spin-up and spin-down states are separated by a magnetic-field-dependent energy. A qubit operation does not move the electron out of the dot; it changes the phase and orientation of its spin state. This compact encoding is one reason silicon dots can be placed close together, although compact geometry also makes electrical cross-talk and device variability important design problems.
How gates control silicon qubits
Single-qubit rotations
A single-qubit gate rotates the electron’s spin on the Bloch sphere. The rotation is driven by a resonant magnetic field or by an electrically driven mechanism that produces an effective oscillating magnetic field. The control system sets the pulse frequency, amplitude, duration and phase. A calibrated pulse can implement operations such as an X or Y rotation, while a carefully timed phase evolution supplies a Z rotation.
Because the resonance frequency depends on the local magnetic and electrical environment, the controller first calibrates each dot. It measures the response to trial pulses, adjusts the waveform, and repeats the sequence often enough to track drift. A reported single-qubit Clifford fidelity is an average over a standardized set of such rotations rather than a guarantee that every possible pulse has the same error rate.
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Two-qubit entangling gates
Two neighboring electron spins become entangled when their exchange interaction is turned on. In a SiMOS double dot, an exchange gate changes the barrier or relative potential so that the electrons interact for a controlled time. The resulting conditional phase or spin rotation is the essential two-qubit operation from which universal quantum circuits can be assembled.
Exchange is fast and electrically tunable, but it is sensitive to voltage noise and to variations in the tunnel coupling. Pulse shaping, operation-point selection and frequent recalibration are used to limit leakage into unwanted orbital or charge states.
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Measurement through charge
Spin is difficult to sense directly, so the processor maps spin information onto a charge configuration. Spin-dependent tunneling or singlet-triplet conversion causes a detectable change in where an electron resides. An RF single-electron transistor senses that charge movement and produces a radio-frequency signal that classical electronics classify as 0 or 1.
Initialization uses the same energy-selective physics in reverse: the device is allowed to relax into a known spin state or is loaded under conditions that favor one state. Readout and initialization fidelity therefore depend on tunnel rates, sensor bandwidth, thermal occupation and the accuracy of the classifier.
What an operating cycle looks like
- Prepare: Set gate voltages, load the required electron pattern and initialize each spin.
- Calibrate: Run reference pulse sequences and tune frequencies, amplitudes, phases, exchange times and measurement thresholds.
- Execute: Apply single-qubit rotations and exchange-based entangling pulses in the programmed order.
- Measure: Convert spin states to charge states and digitize the RF sensor response.
- Estimate: Repeat the circuit many times to obtain probabilities rather than relying on one shot.
- Update: Use the measured error rates and drift indicators to refresh pulse parameters, sensor thresholds or the schedule of calibration routines.
This closed loop is essential. A processor is not operated by sending a fixed list of ideal pulses once; it repeatedly measures its own behavior and compensates for changing device conditions.
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How cold silicon qubits need to be
Silicon spin processors are normally placed in dilution refrigerators, where millikelvin temperatures suppress thermal excitation and stabilize charge sensors. The magnetic-field energy splitting of a spin is small, so excessive thermal occupation would make initialization and readout unreliable.
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Conventional demonstrations have used temperatures in the millikelvin range, but a 2024 Nature experiment demonstrated initialization and readout with fidelity up to 99.34%, single-qubit Clifford fidelity up to 99.85% and two-qubit fidelity of 98.92% while operating above 1 K. Above-1-K operation could simplify the interface between cryogenic hardware and room-temperature electronics, although it does not remove the need for cooling or solve wiring, heat-load and noise problems.
Demonstrated performance
Reported numbers must be read with their scope: they describe particular devices, pulse protocols and measurement conditions, not a guaranteed specification for every silicon qubit.
| Result | Reported value | Scope and source |
|---|---|---|
| Initialization and readout | Up to 99.34% | Above-1-K silicon experiment, Nature, 2024 |
| Single-qubit Clifford fidelity | Up to 99.85% | Above-1-K silicon experiment, Nature, 2024 |
| Two-qubit fidelity | 98.92% | Above-1-K silicon experiment, Nature, 2024 |
| Single-qubit gate fidelity | 99.9% | 300 mm wafer study reported by Intel, 2024 |
| Single-qubit gate fidelity with adaptive noise suppression | Above 99.6% | Nature Communications study |
| Two-qubit fidelity | Above 99% repeatably | Nature Physics study linking errors to slow nuclear and electrical noise and the control sequence |
| State-preparation and measurement fidelity | Up to 99.9% | 300 mm foundry study across four devices, Nature, 2025 |
Clifford fidelity, primitive gate fidelity, and state-preparation-and-measurement fidelity are different metrics. They should not be averaged into one headline number, and a result on a few qubits does not demonstrate that the same fidelity will hold across millions of devices.
Why researchers use silicon
Low magnetic-noise potential
Natural silicon contains silicon-29, a spinful isotope that can create a fluctuating magnetic environment. Isotopic enrichment reduces that source of noise and can extend the time over which a spin retains phase information. Electrical noise remains, however, and charge fluctuations can be converted into effective magnetic-field fluctuations through the device’s control mechanism.
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Small dimensions and CMOS heritage
Silicon quantum dots can be roughly 100 nm across in a 300 mm-wafer process study. The ability to fabricate many devices on a semiconductor wafer provides familiar tools for lithography, process control and yield improvement. It also makes it plausible to integrate dense classical control structures, though cryogenic interconnects and heat dissipation remain difficult.
Manufacturing is not the same as scaling a computer
Wafer-scale fabrication demonstrates that many nominally similar devices can be made and tested. A useful quantum computer additionally needs uniform operating points, high-yield wiring, calibration automation, connectivity between distant qubits, fast measurement and a correction system that works continuously. A Nature wafer report notes that a fault-tolerant machine will require vast numbers of physical qubits and semiconductor-industry-scale fabrication and cryogenic testing.
Where errors come from
- Nuclear noise: residual silicon-29 spins and other magnetic fluctuations perturb the qubit frequency.
- Electrical and charge noise: voltage fluctuations alter confinement, tunnel coupling or the exchange interaction.
- Control imperfections: pulse amplitude, timing, phase and frequency can be slightly wrong.
- Leakage: a pulse can populate an unwanted orbital or charge state rather than the intended spin subspace.
- Drift: gate voltages, resonances and sensor responses change during a run.
- Device variability: lithographic and microscopic differences make nominally identical dots behave differently.
- Measurement errors: finite sensor bandwidth, thermal occupation and an imperfect discrimination threshold can misclassify the state.
A Nature Physics study found repeatable two-qubit fidelity above 99% while associating the remaining errors with slow nuclear and electrical noise and with the applied control sequence. This distinction matters: improving materials alone is insufficient if the pulse schedule amplifies sensitivity to a noisy operating point.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.How quantum error correction works on silicon
Physical and logical qubits
A physical spin qubit is the individual electron device described above. A logical qubit is an encoded state spread across many physical qubits. The code is designed so that local faults can be detected and corrected without measuring the logical information directly.
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Ancilla qubits interact with data qubits and are then measured. Their results, called error syndromes, reveal whether a pattern of bit-flip, phase-flip or related errors occurred. The measurement is arranged to reveal the error class, not the unknown logical state. Repeating these checks over time produces a history of syndromes.
Decoding and correction
A classical decoder processes the syndrome history and estimates the most likely physical error. The control system then applies a corrective operation or updates a software record of the logical Pauli frame. The decoder must keep up with measurement latency, and its model must account for leakage, correlated faults and changing error rates.
The threshold condition
Error correction improves reliability only when the physical error rates, including gates, measurements, initialization and leakage, stay below the threshold of the selected code under the device’s connectivity and noise model. Crossing a threshold is not a single spectacular experiment; it requires sustained performance over many cycles. A 2025 300 mm foundry study reported more than 99% single- and two-qubit control fidelity across four devices and up to 99.9% state-preparation-and-measurement fidelity, which is encouraging for this requirement but is not a demonstration of a fault-tolerant logical processor.
Silicon compared with other quantum-platform choices
| Dimension | Silicon spin qubits | Superconducting circuits | What the comparison means |
|---|---|---|---|
| Physical encoding | Electron spin in a quantum dot | Collective circuit states in a Josephson-junction device | The underlying noise channels and control hardware are different. |
| Operating temperature | Usually millikelvin; operation above 1 K has been demonstrated for a high-fidelity experiment | Typically millikelvin | Higher-temperature silicon operation may ease some integration tasks but still requires cryogenics. |
| Gate mechanism | Resonant spin drive and electrically controlled exchange | Microwave control and tunable circuit coupling | Silicon relies on precise electrostatic tuning of nanoscale dots. |
| Readout | Spin-to-charge conversion followed by an RF single-electron transistor | Microwave reflectometry or related circuit measurement | Readout speed, fidelity and wiring are platform-specific engineering constraints. |
| Fabrication density | Devices around 100 nm in a 300 mm wafer study | Larger circuit structures are common | Small silicon dots are attractive for dense layouts, but dense wiring and control remain unsolved. |
| Connectivity | Nearest-neighbor exchange is natural; shuttling and additional couplers are being studied | Usually fixed couplers with architectures designed around available connections | Logical-code overhead depends strongly on how easily non-neighboring qubits interact. |
| Demonstrated fidelity | Up to 99.85% single-qubit Clifford and 98.92% two-qubit fidelity in the cited above-1-K experiment | Varies by device and experiment | A few-qubit result is not equivalent to a scaled fault-tolerant architecture. |
Scaling beyond a few dots
Wiring and control
Every dot needs gate-voltage control, and many operations need microwave or radio-frequency signals. Routing thousands or millions of independent lines from room temperature into a refrigerator would create unacceptable heat and complexity. Researchers therefore investigate multiplexing, cryogenic control electronics, automated calibration and layouts that reuse control resources without introducing excess cross-talk.
Connectivity and shuttling
Nearest-neighbor exchange is straightforward, but error-correcting codes often need a regular pattern of interactions and repeated measurements. Moving electrons between dots, or coupling distant regions through intermediary structures, can provide additional connectivity. SpinBus-style shuttling is a proposed scaling architecture, not a deployed product, so its practical error budget and manufacturing requirements remain open engineering questions.
Yield and cryogenic testing
A wafer can contain many dies, but a fault-tolerant processor needs nearly all of its required qubits and sensors to meet specification or to be replaceable by the architecture. Testing each device at cryogenic temperature is slow and expensive. Semiconductor-style statistical process control, redundancy and built-in calibration will be as important as the qubit design itself.
What has and has not been achieved
The field has demonstrated high-fidelity one- and two-qubit operations, adaptive suppression of some noise, fabrication experiments on 300 mm wafers and early approaches to greater connectivity. These results show that silicon spin qubits can meet demanding ingredients of a future error-corrected system.
No commercially available, full-scale, fault-tolerant silicon quantum processor has been demonstrated. The outstanding work is systems engineering: maintaining low error rates across a large array, performing repeated syndrome extraction, decoding in real time, managing cryogenic heat and wiring, and proving that logical error rates fall as more correction resources are added.
Bottom line for readers evaluating a claim
When a silicon quantum-processor announcement cites a fidelity, ask which operation was measured, how many qubits were involved, at what temperature, under which calibration protocol and for how many repeated cycles. A strong few-qubit experiment establishes that the mechanism works. A scalable quantum computer requires the same performance across a manufactured array while error correction continuously converts many imperfect physical spins into reliable logical qubits.
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