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Quantum computers are not built around one standard processor design. They use different physical systems to store and manipulate qubits, each with its own control equipment, operating conditions and scaling challenges. The main approaches include superconducting circuits, trapped ions and neutral atoms; spin qubits are another active research direction. Photonic integrated circuits are also being developed as components for some systems, rather than as a delivered result in the evidence discussed here.
What makes quantum hardware approaches different?
A qubit is a physical system used to represent quantum information. A hardware architecture determines what stores that information, how operations and measurements are performed, how qubits interact, and what equipment the processor needs around it. Those choices affect the full machine—not just the chip or device called the processor.
Comparisons are most useful when they separate the physical qubit from the control and readout systems, operating environment, connectivity, error measurements and scaling path. A larger physical-qubit count or a published roadmap does not, by itself, establish fault-tolerant computing. That depends on the quality of operations and measurements, error correction, connectivity and system overhead working together.
How do the main approaches compare?
| Approach | What stores the qubit | Control and readout | Operating conditions and scaling considerations |
|---|---|---|---|
| Superconducting circuits | Fabricated superconducting circuits | For the IBM systems described by IBM, microwave signals drive operations, while readout uses amplification and classical control equipment. | IBM describes cryogenic operation around one hundredth of a degree above absolute zero, with magnetic shielding. Cryogenic capacity, signal wiring and control electronics are system-level engineering concerns. |
| Trapped ions | Ionized atoms confined by electromagnetic forces | IonQ describes using lasers to manipulate and entangle its ions, with laser-based state preparation and readout. | IonQ describes its system as operating in ultra-high vacuum. Precision optical and control hardware are part of the system; IonQ says its architecture offers reconfigurability and all-to-all connectivity. |
| Neutral atoms | Neutral atoms, as presented in Pasqal’s processor brochure | Pasqal’s brochure says its processors support analog and digital modes; further comparable control and readout details are not stated in the retrieved material. | Comparable information about operating conditions, error correction and system scaling is not stated in the retrieved brochure. |
| Spin qubits | A spin degree of freedom | Not stated in the retrieved IBM index entry. | Not stated in the retrieved IBM index entry. |
The table combines architecture descriptions with vendor-specific information. For example, the cryogenic details describe IBM systems, while the connectivity claim is IonQ’s description of its own architecture; neither should be treated as a guarantee for every implementation in that category.
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How do superconducting quantum computers work?
In a superconducting processor, a qubit is built from a fabricated electrical circuit. IBM describes its processors as part of a larger system that includes cryogenic engineering, classical computing workflows, runtime servers and modular control electronics. Microwave signals carry control operations to the processor, and readout equipment measures its state.
The processor is only one layer
Keeping a processor cold enough to operate is one part of the engineering task. The system also needs signal paths into and out of the cryogenic environment, readout amplification, shielding and classical hardware to coordinate operations. These supporting systems matter when assessing how a design might scale: adding qubits also puts demands on the equipment that controls and measures them.
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What IBM’s published figures do—and do not—show
IBM Quantum’s hardware page, accessed October 7, 2026, lists Heron variants with 133 or 156 qubits. Those are vendor specifications for named processors, not a direct measure of how many useful fault-tolerant qubits a system provides. The same page describes Starling as planned for 2029, which is a roadmap target rather than a completed capability. IBM also describes Quantum System Two as deployed at IBM sites and partner centers; that is a vendor statement about its systems.
In a 2026 presentation, IBM Research reported a median randomized benchmarking error of approximately 2.3 × 10−3 per two-qubit gate for its cryogenic CMOS control demonstration on a 156-qubit Heron R2 processor. This is a specific benchmark result for that system and demonstration. It should not be ranked against another platform’s error figure unless the benchmark methods and conditions are comparable.
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IonQ’s primer describes its atomic qubits as ionized atoms trapped in three-dimensional space by electromagnetic forces and manipulated and entangled with lasers. Its technical material also describes laser-based state preparation and readout, along with an ultra-high-vacuum environment.
Trapping and addressing ions requires more than the qubits themselves: vacuum equipment, lasers and precision control are part of the machine. IonQ claims that its architecture is reconfigurable and provides all-to-all connectivity. That is a company-specific description, not a universal property of trapped-ion computers. Its statements about long coherence and low-error potential should likewise be understood as vendor positioning unless compared with independent results using matching benchmark methods.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.What distinguishes neutral-atom and spin-qubit approaches?
Neutral atoms
Neutral atoms are a separate hardware approach from trapped ions. Pasqal’s brochure says its processors support both analog and digital modes. The retrieved material does not establish enough independently comparable detail about control, readout, operating conditions, error correction or performance to support a head-to-head ranking against other platforms.
Spin qubits
IBM Research’s hardware index listed an explainer titled “What are spin qubits?” dated July 23, 2026. That listing establishes that IBM is covering spin qubits as a hardware direction, but the available entry does not provide the technical detail needed to describe a particular implementation’s controls, environment or scaling path.
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Where do photonic integrated circuits fit?
Photonic integration is relevant here as a development effort for trapped-ion systems, not as evidence of a completed, independently assessed quantum computer. In an announcement dated November 7, 2024, IonQ said it was working with imec on photonic integrated circuits and chip-scale ion-trap technology. The stated goal was to move bulk optical components into integrated devices to reduce system size and cost and support scaling. The announcement describes intended benefits, not measured or delivered outcomes.
How should quantum hardware performance be compared?
No single number captures whether one hardware approach is better for a particular workload. A useful comparison asks what was measured, on which system, using what method and under what conditions. It also distinguishes a physical-qubit count from the useful, error-corrected capacity a system may eventually provide.
- Qubit implementation: identify the physical object or degree of freedom holding the information.
- Control and readout: account for the equipment and operations used to manipulate qubits and measure outcomes.
- Operating environment: include infrastructure such as cryogenics and shielding or vacuum and optical systems where the cited implementation requires them.
- Connectivity and operations: check how qubits interact, and attribute topology claims to the company or system that makes them.
- Error evidence: keep the metric, benchmark method, processor and reporting source together. A gate-error figure is not meaningful as a cross-platform ranking without comparable methods and conditions.
- Scaling path: consider control wiring, cryogenic capacity, optical integration, modularity and error correction, separating demonstrated work from announced plans.
The available evidence supports no universal “best hardware” verdict. The right comparison depends on the workload, gate quality, connectivity, error-correction strategy and overhead of the complete system—not just the processor’s advertised qubit count.
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