The 8.7 µs figure is a result reported by one author, Mohammed Talal Kadri, in a 2026 Dev.to post about an electric-vehicle controller identified as v2.4 (ECM: HV-CTRL-01). It is not an independently measured benchmark. The post does not publish raw telemetry, a full test protocol or the hardware and software configuration, and no independent replication or audit of the platform has been identified. This article is based on the post’s indexed text, which describes the test in general terms. Treat 8.7 µs as the author’s claim. The post does not support calling the platform certified or demonstrated ASIL-D compliant.
What the post claims
Every figure below comes from the author’s own account of a hardware-in-the-loop (HIL) test. None is accompanied by raw data or an independent check.
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| Figure | Value as reported | Where it appears in the account | Status |
|---|---|---|---|
| CAN-related latency | 8.7 µs (minimum 7.2 µs, maximum 11.4 µs) | Headline result of the test | Author-reported |
| Voltage | 398.2 V | Stated as constant during the latency result | Author-reported |
| Operating current | 142.5 A | Stated as constant during the latency result | Author-reported |
| Wet-surface coefficient (μ) | 0.26 | Listed with the test conditions; no measurement method given | Author-reported |
| Speed | 42.6 km/h | Listed with the test conditions; no measurement method given | Author-reported |
| Deviation rate | −0.42 rad/s | Listed with the test conditions; no measurement method given | Author-reported |
| Stability ratio | 0.18–0.22 | Listed with the test conditions; no measurement method given | Author-reported |
The post describes an ASIL-D domain built on dual-core lockstep and built-in test (BITE), a separate QM (quality-managed, non-safety) domain, MPU-based isolation, AUTOSAR CRC mechanisms, EVITA in-vehicle security and the HIL set-up. The account does not show how each of these was verified.
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Several title terms carry more precision than the post supplies. The table separates what the post says from what it leaves open.
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- Wireless Connectivity: 2.4G wi-Fi: 802.11 b/g/n, BLE 5
- This product consists of two standalone CAN controller development boards—the T-2CAN and T-2CAN-FD—based on the ESP32 S3 chip. Both support two CAN buses and an SPI interface.
- The CAN module used on the T-2Can is the MCP2515, while the CAN module used on the T-2Can-Fd is the MCP2518.
- Github : github.com/Xinyuan-LilyGO/T-2Can
- If you have any questions or suggestions about the product, please feel free to contact us. We will answer your question as soon as possible.
| Term | How the post uses it | What is not yet established |
|---|---|---|
| ASIL-D | An ASIL-D domain on dual-core lockstep with BITE | Which safety requirements the domain covers, and any independent assessment |
| Zero heap | Fixed allocation, described as “zero memory” and “no memory fragments” | Whether allocation is excluded at startup, during operation and on fault paths |
| CAN-FD latency | Called “CAN-related latency” and, elsewhere, “CAN internet latency” | Start and stop points, bit rates, bus load and message priority |
| MPU FFI | MPU-based isolation; in functional-safety usage, FFI normally means freedom from interference | Evidence behind the freedom-from-interference assertion |
| HIL | Hardware-in-the-loop simulation of the platform | Plant model, I/O set-up and number of runs |
The phrase “CAN internet latency” is ambiguous. It should not be read as a precisely defined CAN-FD measurement, so the title’s “CAN-FD” is the post’s framing rather than a confirmed measurement condition.
What 8.7 µs would have to measure
The post does not define the interval it times, but the scale of the number narrows the options. It names no bit rate. At 500 kbit/s one bit lasts 2 µs, so 8.7 µs is roughly four bit times. At a 2 Mbit/s data phase a bit lasts 0.5 µs, so 8.7 µs is roughly 17. A complete CAN-FD frame carrying data takes considerably longer than that at either rate. A figure of 8.7 µs therefore cannot be whole-frame transmission time. It must describe a segment of the path, and the account does not say which segment.
Rank #2
- Wireless Connectivity: 2.4G wi-Fi: 802.11 b/g/n, BLE 5
- This product consists of two standalone CAN controller development boards—the T-2CAN and T-2CAN-FD—based on the ESP32 S3 chip. Both support two CAN buses and an SPI interface.
- The CAN module used on the T-2Can is the MCP2515, while the CAN module used on the T-2Can-Fd is the MCP2518.
- Github : github.com/Xinyuan-LilyGO/T-2Can
- If you have any questions or suggestions about the product, please feel free to contact us. We will answer your question as soon as possible.
Start and stop points
Latency figures are comparable only when the endpoints are fixed. Candidates include the moment the CAN controller signals reception, the moment the message reaches an application queue, and the moment a control output changes. Each gives a different number, and the post names none of them.
Bus load and message priority
On CAN, a frame waits while higher-priority frames win arbitration, so latency rises with bus load and depends on the identifier priority of the message measured. A result without the load profile and identifier priorities describes one traffic pattern at most, and the account states neither.
Rank #3
- [PACKAGE CONTENTS] Package contains MCP2518FD CANFD module (PCB, black) with dimensions 40 mm x 20 mm x 12 mm; compact hardware ready hobbyists, lab work and classroom use.
- [BROAD NETWORK SUPPORT] Compatible with both CAN FD and CAN 0B protocols, allowing integration into a wide range of automotive, and testbench setups.
- [MEETS INDUSTRY STANDARDS] Conforms to ISO11898-12015 with arbitration to 1 Mbps and data throughput to 8 Mbps to support modern CANFD transmission needs.
- [ EFFICIENT ] Designed low consumption with 15uA sleep current and a typical maximum draw of 20mA during operation, suitable long-running embedded systems.
- [ROBUST FORM FACTOR] Small 40 x 20 x 12 mm PCB with four M2 mounting holes and layout considerations to mitigate interference; 31 FIFOs and a transmission queue provide advanced message handling.
The minimum and maximum
The 7.2 µs and 11.4 µs bounds show spread, but the account does not say how many runs produced them or whether they are the extremes of a measured distribution. The post’s own sentence reads:
“Only the element remained a constant vector at 8.7 microseconds (minimum 7.2/maximum 11.4) with a constant voltage vector of 398.2 V and an operating current of 142.5 A.”
Rank #4
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- Part List CANBed PCBA x1 Sub-D Connector x1 4-Pin Terminal x1 4-Pin 2.0 Connector x 2 9x2 2.54 Header x 1 3x3 2.54 Header x 1
This is the author’s wording, and “Only the element” is unclear as written. The sentence ties the timing result to constant voltage and current, which makes those two values the only test conditions it links directly to the latency number.
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Zero heap: what it removes and what it leaves open
In an RTOS, the heap is the pool that tasks and kernel objects draw from at run time. A zero-heap design allocates everything at build time or during initialization, so no runtime allocation call can fail, fragment memory or take a variable amount of time. That is a real benefit, and it explains the author’s phrases “zero memory,” “no memory fragments” and “constant O(1)”. Those phrases describe the allocator, not the whole system.
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- Bounded allocation time does not bound end-to-end latency. Interrupt priorities, scheduling, bus contention and transceiver delay still contribute.
- The claim that allocation is excluded holds only if it covers startup, error handling and fault-recovery paths. The account does not say whether it does.
- “Interference-free system” is a conclusion the design is meant to support. The post does not demonstrate it.
ASIL-D, freedom from interference and the ISO 26262 context
ASIL is not a label a kernel can carry alone. ISO 26262 assigns integrity levels to safety requirements through hazard analysis and risk assessment of a vehicle function, so a component is developed to ASIL-D as part of a safety-relevant function. The post can say its RTOS domain was designed for ASIL-D. It cannot establish, by itself, that the vehicle function the domain serves meets that level.
ISO’s catalogue identifies ISO 26262-1:2018 as the vocabulary part of its road-vehicle functional-safety series. ISO describes the series as a framework for integrating functional-safety activities into a company’s development framework for safety-related electrical/electronic systems in series-production road vehicles. The catalogue lists that edition as published in December 2018, with the stage shown as “to be revised.” This is general context. It neither verifies the platform nor endorses it.
Freedom from interference is the concept the title’s “FFI” most likely refers to: the requirement that elements at different integrity levels do not corrupt or delay one another. The post’s mechanisms address different failures. MPU isolation limits which code can access which memory. CRC checks detect corrupted messages. A separate QM domain keeps non-safety work apart from the ASIL-D domain. None of these, on its own, shows that timing in the ASIL-D domain is protected from the QM domain under fault conditions. That requires analysis and test evidence that the account does not provide.
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The post does not give enough detail to rebuild the test. Any bench attempt would need a CAN-FD-capable interface, but the post names no adapter, MCU, RTOS version, transceiver or HIL plant, so a reader cannot match the set-up. Buying a generic interface does not reproduce or validate the figure.
Quick Recap
A credible record of this result would need:
- A defined measurement interval, with the timestamp source and clock resolution.
- The nominal and data-phase bit rates, bus load and message identifier priorities.
- Hardware identification for the MCU, MPU, CAN transceiver and the ECM HV-CTRL-01 build, plus the RTOS version and build configuration.
- The HIL plant model and I/O configuration.
- Raw per-run timing data and the number of runs.
- Evidence that memory allocation is excluded across startup, operation and fault paths.
- A freedom-from-interference analysis with supporting test results.
- If ASIL-D is claimed, the independent assessor’s report that supports it.
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