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Spike (RISC-V ISA Simulator)

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What Spike (RISC-V ISA Simulator) is

Spike is a free, open-source simulator that implements a functional model of one or more RISC-V harts. Its documented targets include the RV32I and RV64I base ISAs and extensions covering vectors, floating point, cryptography, and hypervisors. An interactive debug mode lets users inspect registers and memory and control instruction execution. The documentation describes attaching GDB through OpenOCD using Spike’s remote bitbang connection. Developers can extend the simulator by defining an instruction’s behavior, adding its opcode, and rebuilding. The documented build uses C++ and requires device-tree-compiler plus Boost regex and system development libraries. Build guidance covers Unix-like systems, including Linux package-manager instructions and a separate OpenBSD procedure. One stated constraint is that the V extension needs a 64-bit host. The repository license allows redistribution and use in source and binary forms under its conditions and disclaimers, but it does not require the Regents to provide ongoing maintenance or support. The project is maintained by RISC-V International through the RISC-V Software organization.

Who it suits

Spike may suit developers working with RISC-V harts who need simulation, debugging, or instruction customization. Users should be comfortable with its documented C++ build prerequisites and host-system requirements.

What it does well

  • Models one or more RISC-V harts
  • Includes interactive register and memory debugging
  • Documents GDB connection through OpenOCD
  • Allows custom instruction additions
  • Free and open source

What to know first

  • The V extension requires a 64-bit host
  • Build requires device-tree-compiler and Boost libraries
  • The license does not require maintenance or support

Plans

PlanBilled and limitsPrice
SpikeNo paid plans or pricing statedFree

As github.com lists them, read 11 Oct 2026. The maker's own page has the final word.

Verdict

Spike offers functional RISC-V simulation with documented debugging and extension workflows. Check that the target ISA, host system, and build prerequisites fit your project.

Facts from Spike (RISC-V ISA Simulator)'s own pages

Build requirements
The documented build uses a C++ build process and lists device-tree-compiler and Boost regex/system development libraries as prerequisites. · github.com, 11 Oct 2026
Customization
The README explains how to add an instruction by defining its behavior, adding its opcode, and rebuilding the simulator. · github.com, 11 Oct 2026
Debugging
Spike includes an interactive debug mode for inspecting registers and memory and controlling instruction execution. · github.com, 11 Oct 2026
GDB integration
The README documents attaching GDB through OpenOCD using Spike’s remote bitbang connection. · github.com, 11 Oct 2026
Headquarters
Switzerland · github.com, 28 Sept 2026
ISA support
The README lists RV32I/RV64I base ISAs and many extensions, including vector, floating-point, cryptography, and hypervisor extensions. · github.com, 11 Oct 2026
License
The repository license permits redistribution and use in source and binary forms subject to stated conditions and disclaimers. · github.com, 11 Oct 2026
Maintainer
The RISC-V Software organization says its repositories are maintained by RISC-V International and include upstream sources for open source projects. · github.com, 11 Oct 2026
Platform
The README documents building on Unix-like systems, including Linux package-manager instructions and a separate OpenBSD build procedure. · github.com, 11 Oct 2026
Purpose
Spike implements a functional model of one or more RISC-V harts. · github.com, 11 Oct 2026
Security
GitHub’s repository security page says the project has no SECURITY.md file and no published security advisories. · github.com, 11 Oct 2026
Support
The license says the Regents have no obligation to provide maintenance, support, updates, enhancements, or modifications. · github.com, 11 Oct 2026
Vector limitation
The README states that the V extension requires a 64-bit host. · github.com, 11 Oct 2026

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