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Gallium nitride (GaN) is not a universal replacement for silicon or silicon carbide. Its opportunity in AI data centers is more specific: faster switching, smaller magnetics, higher power density, and potentially more efficient power-conversion systems—provided designers solve gate drive, electromagnetic interference, thermal management, protection, reliability, packaging, and manufacturing economics at the same time.
That is the central message of EE Times PowerUP episode 4, published May 29, 2025. The 23:10 episode features Pietro Scalia, Renesas’ senior director of power-system marketing and architecture, in a discussion of AI-data-center power delivery, Renesas’ Transphorm acquisition, high-voltage GaN, reliability, packaging, and future power architectures.
What the EE Times podcast actually argues
The episode presents AI infrastructure as a new power-conversion challenge. AI accelerators can create higher rack power, sharper load transients, and much greater demands on voltage-regulator modules, intermediate bus converters, AC/DC front ends, cooling, cabling, protection, and facility distribution.
Scalia discusses possible future distribution architectures using buses of approximately ±400 V or ±800 V. These are interview claims and possible industry directions—not universal standards adopted by every data center.
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The episode also discusses future computational racks in the range of roughly 600 kW to 1 MW, and a claimed power density of approximately 2,000–3,000 W/in³. Those figures should be read as Renesas’ forecasts or market observations, not measured specifications for a particular deployed rack. Rack power varies with accelerator generation, memory, networking, utilization, cooling design, and facility architecture.
The important distinction is between a rack’s total power and an individual GaN device or converter. A 650-V transistor may contribute to a power-conversion stage, but it does not define the rating of the entire rack.
Why AI data centers make power delivery harder
AI workloads place unusually high demands on power delivery because accelerator clusters can change their electrical load rapidly and concentrate substantial power in a small physical area. The consequences extend well beyond the processor board.
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- Power density: the amount of power processed or delivered in a given volume or footprint.
- Transient response: how quickly a regulator or power system responds to a sudden change in load.
- Reliability: the ability to operate for the required lifetime under electrical, thermal, mechanical, and environmental stress.
Higher rack power increases losses in conversion stages, cables, busbars, connectors, and protection hardware. It also raises cooling requirements. A small efficiency improvement can therefore reduce both electrical consumption and the heat that the cooling system must remove.
Higher switching frequency can reduce the size of inductors, transformers, and capacitors. But it can also increase gate-drive losses, electromagnetic interference, switching losses, layout sensitivity, and control-loop difficulty. The goal is not simply to switch faster; it is to achieve the best system-level trade-off.
Where GaN fits in the power tree
GaN is a wide-bandgap semiconductor technology capable of very fast switching and low switching losses in suitable topologies. This can enable smaller magnetic components and compact power stages.
GaN does not automatically make a converter more efficient. Actual results depend on switching frequency, hard- or soft-switching operation, dead time, gate-drive losses, reverse-conduction behavior, package parasitics, magnetic-component losses, thermal design, control strategy, and protection.
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- 650-V GaN devices for high-voltage conversion;
- approximately 100-V MOSFET or GaN devices for lower-voltage sections;
- gate drivers and controllers;
- intermediate-bus-converter solutions;
- digital power management and intelligent power stages; and
- protection and monitoring circuits.
Renesas’ current product pages list different portfolio ranges. Its GaN discretes page describes products from approximately 25 W to more than 10 kW, while its broader GaN technology page describes conversion coverage from 45 W to above 10 kW. These ranges belong to different pages and should not be merged into a single universal specification.
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Renesas GaN power discretes and its GaN technology page provide the company’s current portfolio and application descriptions.
Enhancement mode, depletion mode, and cascode GaN
One of the episode’s most technical subjects is the choice of GaN device architecture.
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Enhancement-mode devices are normally off. This can simplify the conceptual behavior of a power switch, but gate-drive voltage, dynamic behavior, protection, and high-speed layout still require careful engineering. Enhancement-mode GaN can be attractive in lower-power or lower-voltage designs where driver simplicity and integration are important.
Depletion-mode GaN and cascode devices
A depletion-mode GaN device is normally on. In a cascode arrangement, it is paired with a low-voltage silicon MOSFET to create a normally-off composite switch. This arrangement can offer compatibility with more conventional gate-drive approaches while combining a high-voltage GaN device with a low-voltage silicon transistor.
Renesas has stated a preference for D-mode or cascode architecture in high-voltage, high-power applications. Scalia cites isolated-gate behavior, temperature dependence, dynamic on-resistance, and reverse-conduction characteristics as considerations. He also acknowledges potential advantages for enhancement-mode devices at lower power and voltage.
That is Renesas’ engineering position, not a settled industry consensus. A meaningful comparison should examine:
- normally-off behavior and gate-drive complexity;
- reverse conduction and dead-time requirements;
- dynamic RDS(on) and temperature stability;
- short-circuit tolerance and protection response;
- switching loss and gate charge;
- package parasitics;
- driver availability and compatibility;
- cost and supply; and
- customer familiarity, tools, and qualification history.
Reliability is the adoption gate
For data-center, telecom, automotive, and other mission-critical systems, material-level performance is not enough. Customers need product-specific evidence showing that the device, package, driver, board, and converter survive the intended operating conditions.
The podcast refers to JEDEC 47-related qualification requirements and discusses tests including high-temperature reverse-bias-type testing, high-temperature gate-bias testing, high-temperature operating life, hard-switching boost tests, dynamic on-resistance evaluation, and short-circuit withstand time.
Because spoken transcripts can contain abbreviation or terminology errors, designers should confirm the exact test names, standards, sample counts, voltage, temperature, duration, and pass criteria in the applicable qualification report. A transcript should not be treated as a substitute for a product reliability document.
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Scalia says Renesas uses conditions beyond the cited baseline, including H-TOL at 175°C rather than 150°C, testing up to 3,000 hours, and HTGB at −35 V compared with a cited +20 V standard condition. These are Renesas’ stated test practices, not proof that every Renesas GaN product has identical qualification coverage or that accelerated testing exactly predicts field life.
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A serious evaluation should also examine:
- dynamic RDS(on) drift, current collapse, and trapping;
- gate degradation and threshold-voltage stability;
- overvoltage, avalanche, and unclamped-inductive behavior;
- short-circuit withstand time and shutdown latency;
- thermal cycling and power cycling;
- solder, bond-wire, and interconnect fatigue;
- common-source inductance at the intended switching speed; and
- package reliability under the system’s mechanical and thermal conditions.
Packaging and PCB layout can decide the result
GaN’s fast switching makes parasitic inductance and capacitance more consequential. A device that performs well in a datasheet test can produce excessive overshoot, ringing, EMI, or false turn-on in a poorly designed power stage.
Design reviews should account for:
- gate-loop inductance;
- power-loop inductance;
- common-source inductance;
- drain-to-gate capacitance and Miller coupling;
- Kelvin-source or equivalent low-inductance connections;
- short, controlled-current return paths;
- thermal resistance and heat-spreading paths;
- top-side versus bottom-side cooling;
- creepage and clearance at high voltage; and
- the interaction between package, PCB, driver, and current-sensing layout.
Renesas currently advertises PQFN, TO-leaded, and surface-mount packages with bottom- and top-side cooling, as well as pin-compatible options and bidirectional 650-V devices. Pin compatibility can reduce redesign effort, but it does not guarantee equivalent switching behavior. The replacement board must still be checked for loop inductance, thermal performance, gate-drive behavior, EMI, and protection timing.
Co-packaged drivers, multi-die packages, and alternative cooling directions may improve power density, but they can also increase dependence on one supplier or package family. Second-source availability and package lifecycle policy should be evaluated early.
Bidirectional GaN switches
The episode highlights bidirectional switches as potential enablers for AC/DC conversion and automotive onboard chargers. In selected topologies, an integrated bidirectional device may reduce the number of discrete switches, simplify the power path, reduce losses, or improve power density.
Renesas lists the TP65B110HRU, a 650-V, 110-mΩ GaN bidirectional switch in a TOLT package, along with a corresponding half-bridge evaluation kit.
Designers should distinguish among a monolithic bidirectional device, two back-to-back FETs, and a bidirectional switch used in a particular matrix-converter topology. A lower transistor count does not automatically mean a lower bill of materials. Drivers, isolation, sensing, protection, cooling, control, and EMI filtering may still dominate system cost and complexity.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.What the Transphorm acquisition changes
The interview presents Renesas’ acquisition of Transphorm as a way to combine Transphorm’s GaN technology with Renesas’ manufacturing scale, broader power-management portfolio, commercial reach, packaging options, and multi-regional supply-chain capabilities.
That combination can help customers who want devices, drivers, controllers, reference designs, and design support from a broader supplier. It does not automatically prove that GaN manufacturing has reached mass-market scale or that every product benefits equally from integration.
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Scalia says infrastructure demand was increasing but that the market was not yet scaled in volume at the time of the interview. He describes 8-inch wafers as important for volume production and 12-inch wafers as a possible longer-term destination, without providing a firm timetable.
Larger wafers can increase the number of dies per wafer and reduce cost per die when yield and process maturity support the move. However, the economics also depend on epitaxial-wafer cost, defect density, die size, packaging, test, yield learning, capital expenditure, qualification, and customer volume. A prediction about 12-inch GaN in the coming years should therefore be treated as a forecast, not a confirmed production schedule.
Where silicon and SiC may still be better choices
Silicon MOSFETs remain attractive when switching frequency and physical size are moderate, cost and supply dominate, and the design benefits from a familiar qualification and driver ecosystem.
Silicon carbide may be preferable in selected higher-voltage, high-power, high-temperature, or rugged applications where its ecosystem and qualification path fit the design better.
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GaN is most compelling when fast switching, compact magnetics, high frequency, and power density create enough system value to offset changes in gate drive, layout, protection, qualification, and sourcing.
The correct question is not whether GaN is universally better. It is whether GaN produces a better validated system for the target topology, voltage, frequency, thermal environment, reliability requirement, and production volume.
A practical GaN evaluation checklist
- Define the power stage: identify whether the device is being used in a totem-pole PFC, LLC converter, phase-shifted full bridge, dual-active bridge, Vienna rectifier, matrix converter, intermediate bus converter, or point-of-load stage.
- Confirm voltage and current margins: include overshoot, bus tolerance, transient conditions, temperature, and fault cases—not only nominal ratings.
- Compare real switching losses: examine gate charge, output charge, turn-on and turn-off energy, reverse conduction, dead time, and the intended switching frequency.
- Validate the driver: check drive voltage, source and sink current, isolation, UVLO, Miller management, dead-time control, and fault response.
- Review protection: measure overcurrent detection, short-circuit response, overvoltage clamping, thermal monitoring, and shutdown latency.
- Evaluate the package and board: inspect loop inductance, cooling direction, thermal impedance, creepage, clearance, PCB footprint, and current-return paths.
- Request product-specific qualification: obtain reliability reports and confirm conditions rather than relying on a technology-level presentation.
- Test the complete converter: measure efficiency, thermal behavior, EMI, transient response, ringing, fault recovery, and long-duration stability on representative hardware.
- Check supply resilience: investigate wafer source, assembly location, lifecycle status, lead times, product-change-notification policy, and second sourcing.
- Calculate total system cost: include magnetics, heatsinks, airflow, gate drivers, EMI filters, controls, protection, qualification, redesign, and engineering time.
Beyond AI data centers
The same power-density argument applies to other markets. The interview and Renesas’ product pages identify USB-C and fast chargers, industrial automation, motor drives, robotics, automotive onboard chargers, automotive DC/DC converters, solar inverters, energy storage, and renewable-energy conversion as potential GaN applications.
Renesas lists examples including 100-W and 140-W USB-C supplies, 240-W USB-PD adapters, a 3.6-kW Vienna rectifier, solar microinverters, motor control, and EV-related systems. These are portfolio and application claims from the company, not independent performance comparisons.
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What the episode does—and does not—prove
The EE Times discussion is useful for understanding Renesas’ strategy and the system pressures driving interest in GaN. It is not an independent comparative study. It does not provide independent efficiency curves, complete converter test conditions, measured EMI results, full bill-of-materials comparisons, product-level reliability reports, a direct comparison with named competing parts, or a firm 8-inch or 12-inch production schedule.
Renesas also makes claims about field-use hours, devices shipped, market position, and performance relative to silicon, SiC, and competing GaN products. Those claims should be treated as company statements unless supported by independently verifiable evidence.
The source episode was published on May 29, 2025. Renesas’ product pages can change over time, so designers should verify current datasheets, evaluation-kit availability, package details, qualification documents, and lifecycle information before making a production decision.
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