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Infineon’s Gallium Nitride — Gate Drive Solutions for CoolGaN 600V HEMTs explains several ways to drive its normally-off 600 V GIT HEMTs: an RC-coupled interface, dedicated differential-input drivers, isolated drive, and a hybrid half-bridge combining isolated and non-isolated drivers. It is a useful architecture guide, but not a drop-in circuit recipe: the chosen device’s datasheet, driver documentation, PCB layout, and measured waveforms determine whether a design is safe and performs as intended.
What the whitepaper covers
The paper is an Infineon technical document focused on the interface between a gate driver and a CoolGaN™ 600 V enhancement-mode, gate-injection-transistor (GIT) HEMT. It is not a general introduction to gallium nitride. Its central question is practical: how should a controller’s PWM command become a controlled gate signal in a fast-switching converter, particularly in a half bridge?
Semiconductor Engineering lists the paper on September 8, 2021; a bibliographic listing identifies the technical report as November 2021. Those dates may refer to the host listing and document record respectively, so neither should be treated as an unambiguous publication date.
The paper compares an RC-coupled driver, differential drive using dedicated gate-driver ICs, isolated gate drive, and a hybrid high-side/low-side arrangement. Treat it as an explanation of design options, not a current product catalog or a substitute for later device-specific application material.
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Why the gate interface needs care
Infineon’s CoolGaN 600 V GIT devices use an ohmic p-GaN gate structure and are normally off. Their gate input does not behave exactly like the insulated gate of a conventional silicon MOSFET; diode-like gate behavior makes the required gate bias and current handling specific to the device. A familiar MOSFET driver may be usable in a properly designed interface, but it is not safe to assume that any driver, voltage, or connection will work.
Check the exact HEMT datasheet and relevant application note for permitted positive and negative gate voltage, drive conditions, source and sink requirements, and timing guidance. Excessive gate voltage can damage the gate structure. “600 V” describes a device voltage class; it is not a recommendation to operate continuously at 600 V without margin for bus conditions, transients, creepage and clearance, and system insulation requirements.
Fast switching also makes parasitic inductance and coupling consequential. Gate-loop inductance can distort the voltage at the transistor; common-source inductance can feed power-current changes into the control reference; switching-node transients can disturb the inactive device. A good driver cannot compensate for an uncontrolled layout.
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How the drive approaches compare
| Approach | What it does | When it may fit | Main trade-off |
|---|---|---|---|
| RC-coupled interface | Uses a coupling capacitor and resistors to shape transient and steady-state gate behavior. | A designer wants to adapt an available conventional or dedicated driver and can tune the interface. | Flexible and potentially simple, but sensitive to device, driver, parasitics, and operating conditions. |
| Differential-input dedicated driver | Uses a purpose-built driver architecture to control the gate signal and its behavior amid switching-node movement. | Controlled switching and common-mode behavior are priorities, and a compatible driver and layout are available. | Requires careful selection, supply planning, and placement; it is not automatically faster or better in every design. |
| Isolated drive | Separates control and power-side domains, often for a high-side switch or safety requirements. | Galvanic isolation is required by the topology, safety design, or system architecture. | Adds isolation capacitance, propagation delay, bias-supply and timing considerations, and cost. |
| Hybrid half bridge | Uses an isolated high-side driver and a non-isolated or differential-input low-side driver where isolation is unnecessary. | The high side needs isolation but the low side can share the controller reference, and timing can be matched. | May reduce unnecessary isolation hardware, but requires careful timing, supply, and system validation. |
RC-coupled drive: what the network controls
The RC interface adapts a driver to the GIT gate by providing a transient coupling path and resistive paths that shape gate current and switching behavior. The capacitor supplies a transient component of the drive; the resistors help establish the steady-state and transient behavior. The objective is a controlled gate waveform—not simply the largest possible gate current or the fastest available edge.
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In Infineon’s supporting design material, labels include Rss for steady-state gate-current tuning, Rtr for transient switching-speed tuning, Rtr,on for transient turn-on tuning, and CC for the coupling capacitor or charge-pump element. These terms describe the supporting material and should not be assumed to be a complete symbol list for every schematic in the whitepaper.
Infineon’s quick-reference guide to driving CoolGaN 600 V GIT HEMTs gives an RC-interface tuning procedure and lookup values associated with different slew-rate targets and applications. Use these as a starting point for the documented device and conditions, not as universal values. The result can change with the selected transistor and driver, PCB parasitics, switching frequency, load, temperature, input voltage, hard- or soft-switching conditions, tolerances, and parallel devices.
A practical tuning sequence is to begin with the device- and driver-specific documentation, build a compact layout, and then validate the actual gate and drain waveforms over the intended operating range. Adjust the relevant resistors and capacitor to balance switching speed, ringing, losses, and electromagnetic interference. A setting that looks acceptable at one voltage or load may not be acceptable elsewhere.
Differential and dedicated drivers
A differential-input architecture can help preserve a well-defined drive command while the half-bridge switching node moves rapidly. Dedicated GaN drivers can also provide output characteristics intended for controlled turn-off and reduced risk of spurious turn-on. The useful comparison is not simply “standard versus faster”: examine source and sink paths, propagation behavior, supply requirements, common-mode transient performance, and compatibility with the selected CoolGaN device.
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Driver placement and return routing remain critical. A purpose-built IC cannot eliminate a long gate loop, poor bypass placement, or a noisy shared return. Verify that the driver’s recommended gate conditions match the exact HEMT. Infineon’s current CoolGaN gate-driver resources highlight parts including 1EDF5673K, 1EDF5673F, and 1EDS5663H; current family offerings may differ from the parts discussed in a 2021 paper. Confirm current datasheets and product status before choosing a part.
Isolation and the hybrid half bridge
Isolation is appropriate when the high-side switch needs a separate control domain, the system requires safety isolation, or the architecture calls for galvanic separation. It is not inherently a switching-performance upgrade. Isolated drive brings its own propagation delay, isolation capacitance, supply implementation, timing, and cost concerns.
The paper’s hybrid idea is to isolate the high-side drive while using a non-isolated driver for the low side when the latter does not need galvanic isolation. Infineon’s later hybrid evaluation-board application note describes an example using isolated EiceDRIVER™ 1EDB7275F high-side drive and non-isolated TDI EiceDRIVER™ 1EDN7550B low-side drive, with two IGLD60R070D1 CoolGaN HEMTs in a half bridge. It notes the importance of similar propagation delays across temperature. The approach may avoid isolation where it is not needed, but cost savings are design-dependent, not guaranteed.
Before adopting a mixed-driver arrangement, check propagation-delay mismatch, dead-time variation, high-side bias startup, undervoltage lockout behavior, controller pulse asymmetry, and unequal turn-on and turn-off paths. Consider what happens during an isolated-supply or bootstrap fault. A nominal timing match is not enough if timing shifts with temperature or operating conditions.
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Layout and bring-up checklist
- Keep each driver close to its transistor and minimize the gate-loop area.
- Keep the power commutation loop compact; provide a clean gate-return path rather than sharing a noisy power-current route.
- Account for common-source inductance and use a Kelvin-source connection where the package and layout support it.
- Place driver bypass capacitors close to the driver supply pins.
- Treat the switching node as a high-dv/dt aggressor; keep PWM, feedback, and other sensitive traces away from it where practical.
- Measure gate-source voltage at the device pins, not only at the driver output. Check positive and negative excursions against the device documentation.
- Check drain-source overshoot, switching-node ringing, dv/dt, di/dt, driver-supply droop, dead time, and false turn-on of the inactive device.
- Evaluate temperature, switching losses, efficiency, and EMI across the required input-voltage and load range.
Use a suitable low-inductance probing method with an extremely short measurement loop. A probe connection can add inductance or couple switching noise and make ringing appear worse—or conceal a real problem. Double-pulse testing can help characterize switching behavior, but it does not replace validation in the complete converter and its operating conditions.
False turn-on deserves particular attention: capacitive or inductive coupling from the switching transition can disturb the inactive gate. Check driver sink capability, gate-loop inductance, return-path quality, dead time, and any permitted off-state clamp or negative bias. Infineon’s current driver material discusses firm turn-off behavior as a way to reduce spurious turn-on; follow the selected device’s permitted gate-bias limits rather than importing assumptions from a MOSFET design.
Choosing an approach
- Start with isolation and topology. If safety or system architecture requires galvanic isolation, select an appropriate isolated driver and bias arrangement. In a half bridge, determine separately whether both switches need isolation.
- Check the gate requirements. Match the HEMT’s allowed bias and drive conditions to the driver and any RC interface. Do not transfer gate-voltage assumptions from another GaN family or from silicon MOSFETs.
- Decide how much tuning the project can support. An RC interface can be economical and adaptable, but requires measurement and tuning. A dedicated driver may simplify some design decisions, while still demanding careful compatibility and layout work.
- Validate timing and parasitics. Check propagation delays and dead time, especially in a hybrid arrangement. Review gate and power loops before attributing ringing or false turn-on solely to driver choice.
- Test the full operating envelope. Repeat measurements across voltage, current, frequency, temperature, and relevant production tolerances. Confirm transient margin, EMI, and thermal behavior in the intended converter.
Useful Infineon follow-on material
- Quick-reference guide to driving CoolGaN 600 V GIT HEMTs: practical RC-interface guidance and tuning starting points.
- CoolGaN gate-driver resources: current driver-family information; check the chosen device’s datasheet and product status.
- EVAL_HB_GAN_HYBRID: a hybrid-drive evaluation platform listed for 0.25–2 MHz and 0–450 V output. These are board specifications, not universal HEMT operating limits.
- EVAL_1EDF_G1_HB_GAN: a half-bridge platform listed for 0–3 MHz, up to 35 A, 0–450 V, and up to 2.5 kW; its page has shown it out of stock, so check current availability.
- KIT-HB-GAN-ISO-TLL-A: an isolated half-bridge daughter-board approach.
- EVAL_2500W_PFC_GAN_A: a 2.5 kW totem-pole PFC reference design listed for 90–265 VAC input and 390 VDC output; Infineon states efficiency above 99% for this system solution and its specified context, not for arbitrary CoolGaN designs.
- EVAL-3K6W-LLC-GAN: a 3.6 kW, 385 V-to-52 V LLC demonstration platform using a CoolGaN device on the primary side.
What the whitepaper does not settle
The paper does not make its circuits interchangeable across CoolGaN devices, newer product generations, integrated power stages, other vendors’ GaN transistors, or silicon and SiC alternatives. Gate structure, allowable bias, isolation needs, driver timing, package parasitics, cooling, frequency, EMI targets, and safety certification all affect the choice. An integrated power stage may reduce external gate-drive work but offers different design flexibility; other transistor technologies may be a better fit where cost, switching frequency, ruggedness, or validation effort favors them.
Before design release, verify the exact transistor and driver datasheets, RC values and tolerances, gate-voltage excursions, timing and dead time, startup and fault behavior, PCB clearances, transient overshoot, thermal limits, and EMI over the complete operating range. Evaluation-board frequency, current, voltage, and power figures describe those boards under their stated conditions; they are not ratings for every CoolGaN HEMT or driver.
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