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India’s semiconductor push has moved beyond announcements: Micron opened an assembly-and-test facility in Gujarat in February 2026, and the government said ten semiconductor projects were under construction. But the distinction matters: Micron’s plant packages and tests memory chips; it is not a wafer fab. Tata Electronics’ planned Dholera fab is the flagship front-end project, and the available evidence through August 18, 2026, does not establish that it is shipping commercial wafers.
What changed since the 2024 announcements?
When EE Times published “India’s Fab Plans Materialize, at Last” on September 30, 2024, the news was a cluster of proposals and partnerships, not a factory opening. The centrepiece was Tata Electronics’ planned wafer fab in Dholera, Gujarat, with Taiwan’s Powerchip Semiconductor Manufacturing Corporation (PSMC). Other developments included U.S.-India cooperation on a proposed specialty-chip facility, a Tata–Analog Devices alliance to explore manufacturing opportunities, and reports that Tower Semiconductor and the Adani Group were considering a Maharashtra project. Micron’s Gujarat assembly-and-test facility was part of the wider push.
The strongest subsequent proof of execution is Micron’s Sanand facility, inaugurated on February 28, 2026. Meanwhile, the Indian government said in February 2026 that ten projects—two fabs and eight packaging or related facilities—had been approved, with about ₹1.6 lakh crore in envisaged investment and ten units under construction. Tata’s Dholera project had also advanced into equipment and ecosystem planning: Tata Electronics and ASML announced a partnership in May 2026. Those are meaningful milestones, but approvals, construction, partnerships and commercial output are different stages.
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Tata Electronics’ proposal, approved by the Indian government in February 2024, is for a front-end semiconductor fab at Dholera, Gujarat. Tata put the planned investment at up to ₹91,000 crore—about US$11 billion at the time of announcement—and described a 300-mm (12-inch) wafer facility with planned capacity of about 50,000 wafer starts per month. PSMC is the technology and execution partner. Tata has said the fab is intended to serve automotive, computing, communications and artificial-intelligence markets.
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- Location: Dholera, Gujarat.
- Indian company: Tata Electronics.
- Technology partner: Taiwan’s PSMC.
- Announced investment: Up to ₹91,000 crore, approximately US$11 billion at the time.
- Wafer format and planned capacity: 300 mm; about 50,000 wafer starts per month.
- Process generations: Tata identified 28 nm, 40 nm, 55 nm, 90 nm and 110 nm in its May 2026 announcement with ASML.
- Employment estimate: Tata has projected more than 20,000 direct and indirect skilled jobs.
These are company and project-plan figures, not proof of achieved capacity, hiring or production. Tata’s May 2026 ASML partnership announcement concerns lithography tools, workforce training, supply-chain resilience and research infrastructure. It is evidence of ecosystem preparation, not confirmation that commercial wafers are being produced.
The planned process range is often called mature-node technology. “Mature” does not mean useless or obsolete. Chips made on these processes are widely used in vehicles, industrial controls, power management, communications and appliances, where reliability, cost and long qualification cycles can matter more than fitting the greatest number of transistors onto a die. The trade-off is that a 28–110-nm fab would not put India at the leading edge of advanced smartphone or AI logic production.
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Fab, packaging plant or test facility? The distinction
A semiconductor product moves through several steps: design; front-end fabrication, where transistors and wiring are built on silicon wafers; wafer sort, which tests individual dies; assembly and packaging, which separates dies and connects and protects them; and final test. A company can participate in manufacturing without operating a wafer fab.
| Project | Location | What it does | Status established by the cited sources |
|---|---|---|---|
| Tata–PSMC | Dholera, Gujarat | Planned front-end wafer fabrication | Approved project; construction and ecosystem preparation reported. Commercial wafer output is not established here. |
| Micron | Sanand, Gujarat | Assembly and testing for DRAM and NAND memory products | Facility inaugurated February 28, 2026; Micron calls it India’s first semiconductor assembly-and-test facility. |
| Tata Semiconductor Assembly and Test | Morigaon/Jagiroad, Assam | Packaging and testing | Approved project; the government’s 2026 listing gives a planned investment of ₹27,120 crore and approximately 48 million units per day. |
| CG Power–Renesas–Stars | Sanand, Gujarat | Assembly, testing and specialized-chip manufacturing | Approved project; the 2026 government listing gives investment of ₹7,584 crore and planned capacity of approximately 15.07 million units per day. |
| Kaynes Technology and other approved units | Several states | Packaging, substrates, compound semiconductors and related manufacturing | Part of the wider approved portfolio; project functions and progress vary. |
Micron’s opening is a real manufacturing milestone, but calling it a wafer fab would be inaccurate. Assembly and test add valuable production capability and jobs, and packaging is an important part of the semiconductor supply chain. They do not, by themselves, mean that the silicon wafers were fabricated in India. India had significant chip-design capability before this build-out; the newer projects aim to add more domestic manufacturing and packaging capacity.
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What has actually materialized by August 18, 2026?
- Operating assembly and test: Micron’s Sanand facility was inaugurated on February 28, 2026. The company and India’s Prime Minister’s Office describe it as an assembly-and-test operation for DRAM and NAND products. That is the clearest operational milestone in the available evidence.
- A project pipeline under construction: The government’s February 2026 account says ten projects had been approved—two fabs and eight packaging or related facilities—and ten units were under construction. It put envisaged investment at roughly ₹1.6 lakh crore. These are portfolio and construction claims, not a count of ten operating plants.
- Equipment and ecosystem planning: Tata’s May 17, 2026 announcement with ASML points to tool, training and supply-chain preparation for Dholera. Such preparation is necessary for a fab, but it is not the same as installed, qualified production equipment or customer shipments.
- Commercial wafer production remains the key unproven step: The cited sources do not establish that Dholera has begun commercial wafer production, met target yield, or shipped qualified wafers to customers. Nor do they establish that the proposed U.S.-India specialty-chip facility or reported Tower–Adani plans are operating projects.
A useful way to judge any semiconductor announcement is to ask four questions: Has it received policy approval? Is there a disclosed financing commitment? Is there physical execution—construction, utilities, equipment and workforce preparation? And, finally, are qualified products being shipped commercially? India has clear evidence of the first three for multiple projects; Micron has reached operating assembly-and-test activity. That does not demonstrate commercial output from the Dholera front-end fab.
Why India’s earlier fab ambitions were difficult
A wafer fab is not just a large building with expensive tools. It needs dependable power and water, clean-room infrastructure, specialized chemicals and materials, equipment servicing, skilled process engineers and technicians, and customers willing to qualify and buy its products. A fab also needs sustained utilization: installed capacity that lacks enough orders can be financially fragile. Government incentives can help a project get built, but cannot by themselves guarantee high yield, competitive costs or profitable operation.
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That is why a credible technology partner, construction progress and a broadening supplier base matter—and why none alone settles the outcome. Process yield usually improves through learning and iteration. Customer qualification takes time, particularly in automotive and industrial markets. Tool installation and commissioning are distinct from producing wafers at commercial scale.
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Assembly, testing and packaging facilities can build manufacturing skills and supplier relationships without requiring the same process technology as a front-end wafer fab. Packaging is not a consolation prize: it is a necessary step for turning dies into usable products, and its role is growing as manufacturers combine different chips and functions in a package. But it does not replace wafer fabrication. If wafers are imported and packaged locally, India gains local value in later production stages while remaining dependent on overseas wafer supply.
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- SEMICONDUCTOR EDUCATION USE: Suitable for classrooms, laboratories, engineering courses, STEM activities, and demonstrations of wafer structures and semiconductor manufacturing concepts.
- TECHNOLOGY DISPLAY ITEM: Ideal for exhibitions, science displays, collections, and demonstrations related to microelectronics and semiconductor technology.
- INDIVIDUAL PACKAGING: Each sample is separately packaged to help maintain surface cleanliness and reduce scratches during storage and handling.
Partnerships also cut both ways. PSMC, Micron, Renesas, Stars and ASML bring international technology, equipment or operating experience into the Indian ecosystem. That can accelerate capability-building; it also means domestic manufacturing remains interdependent with foreign process knowledge, tools, materials and customers. “Made in India” should not be confused with immediate technological independence.
What could derail the plans?
- Construction and infrastructure delays: Clean-room readiness, reliable electricity and water, transport, and chemical supply all have to arrive on schedule.
- Equipment installation and ramp-up: Tools must be delivered, installed and qualified. Early production may face yield challenges.
- Skills and supplier depth: A fab needs experienced process and equipment staff as well as dependable local and international suppliers.
- Customer demand: Mature-node capacity needs long-term customers and product qualifications, not only an announced monthly wafer target.
- Financial exposure: Large capital requirements, utilization, currency movements and the timing of subsidies can affect project economics.
- Milestone inflation: Announcements, memoranda of understanding, approvals, construction, pilot wafers and commercial shipments should not be treated as interchangeable.
These are execution risks, not evidence that a particular project has failed. They explain why reported investment and planned capacity should be presented as plans until operating results are documented.
Can India become a major semiconductor manufacturing hub?
India has a plausible route to becoming a more important manufacturing base, particularly in packaging and testing and, if Dholera is successfully commissioned and ramped, mature-node wafer fabrication. It is not yet accurate to describe India as the next Taiwan or as self-sufficient in chips. Taiwan’s foundry position, South Korea’s strength in memory and integrated manufacturing, and China’s scale reflect decades of accumulated suppliers, process experience and customer relationships. Malaysia and Vietnam, meanwhile, are important examples of how assembly and supply-chain diversification can grow without being synonymous with leading-edge wafer fabrication.
The outcome will depend less on the headline investment total than on what happens after construction: reliable utilities, installed and productive tools, competitive yield, sustained orders, qualified products and repeat shipments. On the evidence available through August 18, 2026, India has moved from mostly aspirational policy to a real industrial pipeline and an operating memory assembly-and-test facility. Its flagship domestic wafer fab remains to be judged by commercial production.
Quick Recap
Sources
- Tata Electronics: Dholera fab announcement
- Government of India: February 2026 semiconductor project summary
- Lok Sabha project-status document
- Micron: Sanand facility opening
- Prime Minister’s Office: Micron inauguration
- Tata Electronics: ASML partnership
- India Semiconductor Mission
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