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“Arm Timers; and Fire!” is the title of a KVM Forum 2018 presentation by Christoffer Dall. Its central lesson is that an Arm virtual machine needs more than a virtual counter: pause, host suspend, migration between machines with different counter frequencies, and host CPU contention all require an explicit time contract between KVM and the guest. The talk’s paravirtualized-time design addresses those cases while reducing the need for hypervisor traps.
This article explains the Arm Generic Timer model, how KVM uses it, why ordinary virtual timers are insufficient, and how the 2018 proposal separates physical, live, virtual, and stolen time. The presentation is historical; descriptions of proposed or “beta” interfaces are attributed to that source and should not be read as proof of identical support in every 2026 Linux, KVM, QEMU, firmware, or Arm implementation.
The short version
Arm’s Generic Timer provides a monotonically increasing counter and comparators that can signal timer events. KVM can virtualize those facilities so a guest reads a virtual counter and programs virtual deadlines with little or no trapping during normal execution. That model is adequate until the VM is paused, the host sleeps, the VM migrates to hardware with a different native frequency, or a runnable vCPU is delayed by an oversubscribed host.
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Paravirtualized time adds shared, hypervisor-maintained information: a stable guest-facing frequency, conversion parameters, live physical time, and (for each vCPU) stolen CPU time. The guest can then preserve a coherent clock across migration and distinguish intentional pauses from time spent waiting for host scheduling.
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The talk and its slides are archived by the KVM Forum 2018 schedule and in the presentation PDF.
Arm Generic Timer fundamentals
Counter versus timer
A counter is a time base: it advances in ticks at a machine-specific frequency. A timer compares that counter with a programmed deadline and asserts an output when the counter reaches it. Confusing the two is a common source of migration bugs: changing a virtual-counter offset does not automatically rewrite every pending timer deadline.
The physical counter is architecturally accessible through CNTPCT_EL0. A guest-facing virtual counter is read through CNTVCT_EL0 and is derived conceptually as:
Virtual Counter = Physical Counter - CNTVOFF_EL2
CNTVOFF_EL2 is controlled by the hypervisor, allowing KVM to choose the guest’s time origin and adjust it when a VM is moved or resumed.
Timer registers and delivery
A timer has a compare value (often called CVAL) and a control register (often called CTL) containing enable, interrupt-mask, and status controls. The basic condition is:
Counter >= CVAL
The resulting timer signal still has to pass through the interrupt-virtualization machinery before the guest observes an interrupt. A virtual timer does not, by itself, directly inject a virtual interrupt; that shorthand hides an important part of the KVM path.
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Exception levels and timer inventory
In the terminology used by the presentation, Armv8.0 provides an EL3 physical timer, EL2 physical timer, EL1 physical timer, and EL1 virtual timer. Virtualization Host Extensions (VHE), introduced with Armv8.1, add an EL2 virtual timer. The EL3 timer normally belongs to the secure world and is outside an ordinary KVM guest’s interface. Exact exposure depends on the processor, firmware, host kernel, and hypervisor configuration.
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How KVM arranges timers
VHE hosts
In the VHE arrangement shown in the talk, Linux and KVM use the EL2 physical timer. The guest uses its EL1 virtual timer and/or EL1 physical timer as presented by the hypervisor; the described arrangement does not rely on the EL2 virtual timer.
Non-VHE hosts
Without VHE, the host uses the EL1 physical timer and the guest uses the EL1 virtual timer directly. The guest’s EL1 physical-timer accesses are handled with trap-and-emulate. The EL2 physical timer is not used in this arrangement, and an EL2 virtual timer may not exist.
The practical distinction is not that one mode makes time “real” and the other makes it “fake.” Both present a controlled guest view. The difference is which exception-level resources can execute directly and which accesses must trap to KVM.
Why an ordinary virtual counter is not enough
Intentional VM pause
If a hypervisor stops a VM, the guest’s wall-clock-like view must follow a deliberate policy. Advancing exactly as though the vCPU had continued running may be wrong for a live-time abstraction; freezing every clock may break wall-clock expectations. The hypervisor must define which intervals are removed and which are retained.
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During host suspend, the VM is unavailable for an interval that may be much longer than a scheduler tick. On resume, an unadjusted virtualized clock can jump, stall, or cause guest watchdog and “lost tick” diagnostics. Wall-clock, monotonic, virtual-CPU, and stolen-time accounting are separate questions.
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Migration to a different counter frequency
Arm’s generic-counter frequency is a property of the machine. A VM can move from a source with native frequency Fn to a destination with another Fn. Reusing source counter values as if they were destination ticks changes elapsed-time calculations. Both the guest counter offset and outstanding timer deadlines must be transformed.
Stolen CPU time
A vCPU can be runnable yet unable to run because the host is oversubscribed. Guest code that sees only its own progress cannot tell whether a delay reflects a long-running task, an interrupt problem, or host scheduling starvation. Exposing stolen time lets guest schedulers and accounting code make that distinction.
Paravirtualized time
The presentation proposes a unified Arm interface discoverable through SMCCC v1.1, with defined hypercall numbers, arguments, return codes, and shared data structures. The slides called the specification beta in 2018; that historical label should not be projected onto current SMCCC or Linux behavior without checking current specifications and source code.
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- Physical time: elapsed time according to the machine’s physical counter.
- Live physical time: physical time with deliberately paused VM intervals removed, conceptually
Physical time - Paused time. - Virtual time: time in which the vCPU is executing or intentionally waiting for an interrupt, according to the chosen guest model.
- Stolen time: time for which the vCPU was runnable but waiting for host scheduling.
These are not interchangeable clocks. A design that reports live physical time can still separately report stolen CPU time, for example.
Native and paravirtualized frequencies
Let Fn be the hardware counter frequency and Fpv the stable frequency chosen for the guest interface. A conceptual conversion is:
PV Time = Counter × (Fpv / Fn)
The shared conversion block described in the slides includes fields such as sequence_number, scale_mult, shift, Fn, Fpv, and a division multiplier. The sequence number gives readers a lock-free consistency check: read it, copy or use the conversion data, read it again, and retry if it changed during the operation.
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u64 live_physical_time(void)
{
u64 x;
u32 before, after;
do {
before = ptv->sequence_number;
x = scale_to_fpv(CNTVCT_EL0);
after = ptv->sequence_number;
} while (before != after);
return x;
}
This illustrates the algorithm, not a claim that the exact function is a current production API.
Programming a hardware timer from paravirtualized time
Reading time in PV units and programming a hardware comparator in native units are inverse operations. If a guest wants a PV interval, the native-tick interval is approximately:
Interval_native = Interval_pv × (Fn / Fpv)
To avoid rounding down and firing early, the presentation gives a ceiling-style integer conversion:
(Fn × Interval_pv + Fpv - 1) / Fpv
A correct clock read therefore does not guarantee a correct interrupt deadline. The implementation must use the right direction of conversion, account for the current virtual-counter offset, handle arithmetic width and wraparound, and treat an already-expired deadline as an immediate-delivery case rather than programming a stale compare value.
Independent reader supportYour contribution helps us test, update, and keep practical guides available for everyone.What migration must preserve
Counter state
- Capture the guest’s live physical time on the source.
- Represent it in source-native units.
- Convert the state for the destination native frequency.
- Recalculate
CNTVOFF_EL2so the guest observes a continuous virtual counter. - Publish the destination conversion data with a consistent sequence-number update.
- Resume the VM using the new, coherent time base.
Copying a numeric counter value without changing its frequency interpretation is insufficient.
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Pending timer state
- Save each timer’s remaining interval or deadline on the source.
- Convert it from source-native ticks to destination-native ticks.
- Rebuild the destination compare value.
- Program the destination timer and inject or service an expired deadline as required.
A VM can have a correct counter and still misbehave if its pending timer compares remain in source-frequency units. Migration downtime also matters: a deadline that expires while the VM is stopped must not be silently scheduled as if it were still in the future.
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Hard cases
Implementations must define behavior for differing frequencies, long downtime, 64-bit wraparound, concurrent PV-structure updates, guests that mix raw and PV time, and nested virtualization. In nested setups, host and guest hypervisors may use different VHE modes and each may apply offsets or scaling. PV time exposed at one layer is not automatically valid at the next.
Stolen-time accounting
The presentation describes a per-vCPU shared structure containing a value such as stolen_time. It is read with 64-bit single-copy atomic operations and, unlike the live-physical-time structure, does not use the same sequence-number retry protocol.
With that information, a guest can distinguish CPU execution delay caused by host contention from the passage of wall-clock time. Guest schedulers can avoid treating a starved vCPU as inherently slow, accounting can report host interference, and operators can investigate oversubscription from inside the VM. Support and semantics still vary by guest OS, kernel, hypervisor, and platform.
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| Event | What stopped? | What time logic must decide |
|---|---|---|
| Intentional VM pause | The VM was deliberately stopped | Whether live guest time excludes the pause and how expired timers are delivered |
| Host suspend | The physical host became unavailable | How a large discontinuity is represented without corrupting watchdog or scheduler accounting |
| Migration stop | The VM was stopped for state transfer | How counter offsets, frequencies, and pending deadlines are transformed |
| Host contention | A runnable vCPU waited for a host CPU | How stolen time is exposed separately from elapsed wall-clock time |
There is no single “time stopped” flag that answers all four cases. The chosen clock abstraction determines whether an interval advances, is removed, or is reported as stolen.
Debugging symptoms
Time changes after live migration
- Check whether source and destination counter frequencies were converted.
- Verify the new
CNTVOFF_EL2value against the captured guest time. - Check that PV conversion data was published atomically from the guest’s perspective.
- Confirm that the guest is not reading a raw counter while assuming
Fpv.
Timers fire early or late
- Inspect native/PV conversion direction and rounding.
- Recompute deadlines using the current virtual-counter offset.
- Check whether a deadline expired during migration downtime.
- Separate timer expiry from delayed interrupt injection.
Lost-tick or clock-instability warnings
- Look for unmodelled host suspend or VM pause.
- Determine whether a supposedly direct access is trap-and-emulated.
- Check sequence-number retry logic and frequency agreement.
- In nested virtualization, trace every offset and scaling layer.
Poor scheduling under load
If runnable vCPUs appear delayed but no stolen-time data reaches the guest, the guest may misdiagnose host CPU starvation as an internal scheduling problem.
Historical status and the lasting lesson
“Arm Timers; and Fire!” is best read as an architecture discussion from 2018, not as a current compatibility promise. The slides’ SMCCC discovery model, PV-time structures, and nested-virtualization notes need to be checked against the current Arm SMCCC specification and the exact Linux/KVM/QEMU versions being deployed. The durable idea is broader: virtualization needs a defined time contract covering frequency, offsets, timer deadlines, pause semantics, migration, and host scheduling—not merely a virtual counter register.
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