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This project builds an analog-to-digital converter from ordinary circuit blocks to read a magnetic rotary encoder used to control digital-audio playback. Hackaday describes it as a delta-sigma ADC and tags it as 16-bit, but the published description does not establish either a conventional delta-sigma loop or 16-bit effective accuracy. The useful takeaway is how integration, feedback, timing and counting can turn an analog level into a digital value—and what a builder must measure before calling the result high-resolution.

What the project builds

In the Hackaday project published October 4, 2025, Igor builds an ADC for a magnetic rotary encoder. Its digital output serves as a control for digital-audio playback; the demonstrated job is reading a control input, not sampling audio.

“From scratch” here means assembling the converter from standard analog and digital building blocks, not fabricating semiconductor devices. The described signal path includes an op-amp integrator, a feedback signal, a clock, a counter and digital timing logic. The op-amp integrates the input and feedback signals; the counter turns timed behavior into a digital result. The article text does not provide component values or a complete schematic, so those details should not be inferred.

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Analog and digital work

  • Analog: the input path, integrator, feedback signal and threshold detection needed to decide when the analog state has reached a relevant level.
  • Digital: clocking, timing, counting, reset or sequencing, and presenting the resulting code.

A microcontroller or FPGA could implement some timing and counting functions, but doing so would not by itself reproduce or validate the analog conversion behavior. A microcontroller’s built-in ADC is a different solution: it delegates conversion to an integrated converter rather than exposing this circuit’s analog loop.

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How an integrating ADC turns voltage into a count

An ideal op-amp integrator with a resistor at its input and a capacitor in its feedback path follows this relationship:

Vout(t) = Vout(0) − (1/RC) ∫ Vin(t) dt

In plain language, the input determines how quickly the integrator output moves. A practical converter uses a reference or feedback signal to control that motion, while digital logic measures time or counts clock periods associated with the conversion. The count can then represent the input level.

  1. Establish a starting state. Reset or otherwise place the integrator and digital timing logic in a known condition.
  2. Apply the input and feedback. Their combined effect determines the integrator’s slope and direction. Feedback polarity matters: the wrong sign can drive the output away from the intended operating point.
  3. Measure the conversion interval. A clock provides the time base. Depending on the exact topology, logic counts clock periods during a ramp or another defined integration sequence.
  4. Form an output code. The count is interpreted as a digital representation of the input, subject to the chosen reference, timing and calibration.

This is the general integrating-converter principle, not a claim that the Hackaday circuit uses a particular unreported reset sequence, threshold or set of component values. The article points readers to a video with timing diagrams and theoretical explanation, but its text does not reproduce a complete build specification.

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Is it delta-sigma, single-slope or another integrating design?

Architecture qualification: Hackaday calls the circuit delta-sigma. A commenter on that same page disputes the label and describes it as a single-slope integrating ADC. The available article description is not detailed enough to settle the classification, so neither label should be presented as independently verified.

These terms describe related but distinct ways of converting an input. Integration alone does not make a converter delta-sigma.

  • Single-slope: a ramp is measured against a threshold; the time to reach that threshold represents the input.
  • Dual-slope: the input is integrated for a fixed interval, then a reference of opposite polarity drives the integrator back; the return time encodes the input.
  • First-order, 1-bit delta-sigma: a loop integrates the difference between input and feedback, quantizes the result, and feeds the quantizer output back through a DAC. Oversampling and digital filtering are used to recover a higher-resolution value from the bitstream.
  • Higher-order delta-sigma: additional loop filtering stages shape quantization noise; digital decimation filtering is normally part of producing the output samples.

To identify the project conclusively, a reader would need enough circuit detail to see the quantizer and feedback arrangement, integrator count and loop order, output representation, and any digital decimation filter. The article’s high-level description does not supply those details. Its label is best treated as Hackaday’s description rather than a verified topology analysis.

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What “16-bit” and “high resolution” do—and do not—mean

Hackaday’s page is tagged “16-bit.” That indicates a nominal bit-width claim in the page’s framing, not a published measurement of usable analog performance. For an ideal N-bit converter with full-scale span VFS, one quantization step is approximately VFS/2N. At 16 bits, that is VFS/65,536.

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  • Nominal resolution: the number of output-code bits. A 16-bit code has 65,536 possible values.
  • Quantization step: the ideal input increment represented by one least significant bit (LSB), given the full-scale range.
  • Effective number of bits (ENOB): usable resolution after noise and distortion are considered.
  • Accuracy: how close a reported value is to the actual input, including offset, gain, reference and linearity errors.
  • Repeatability: whether repeated measurements at the same input produce the same result.
  • Dynamic range: the usable span between the smallest reliably distinguishable signal and overload.
  • Bandwidth and conversion rate: how quickly the converter can follow changing inputs and how often it produces a result.

The Hackaday article does not report INL, DNL, SNR, SINAD, ENOB, noise-free resolution, conversion rate or reference error. A 16-bit counter or output word cannot establish 16-bit analog accuracy. A stable display might reflect averaging or filtering while still containing offset, gain or linearity error.

Why an integrating approach can suit a control input

Integration accumulates signal over time, which can average some noise. A longer measurement window or additional oversampling may improve stability, but it costs response speed and can increase latency. The clock, threshold behavior, reference and analog settling also affect whether the count is meaningful.

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That exchange can make sense for a rotary control. A person turns a knob far more slowly than an audio waveform changes, so a control reading may tolerate a slower update and benefit from a smoother result. This does not establish that the converter is suitable for digitizing audio; the demonstrated role is controlling playback.

The educational value is also real: a builder can see how feedback, integration, time measurement and digital logic interact instead of treating an ADC IC as a black box. The project may be adaptable to other slow inputs, but the article does not document a tested list of alternatives.

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What limits real performance

In a long integration interval, small nonidealities can accumulate. A nominally large count range is useful only if the analog path, reference and timing remain sufficiently stable over that interval.

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  • Integrator components: resistor and capacitor tolerance set scale; capacitor leakage, dielectric absorption and temperature behavior can undermine long measurements.
  • Op-amp: input offset, bias current, noise, input common-mode range, output swing, gain-bandwidth and slew rate can limit the ramp or introduce error.
  • Reference: an error or drift in reference voltage changes conversion scale; supply noise and inadequate decoupling can move codes.
  • Threshold detector: comparator noise and propagation delay create uncertainty, especially when the integrator slope is shallow.
  • Clock and counting: clock jitter, reset timing, asynchronous signals, metastability or counter rollover can create timing and code errors.
  • Layout and grounding: switching edges can couple into the integrator through power rails, ground impedance or parasitic capacitance. Leakage across a contaminated board can matter at high resolution.
  • Encoder front end: sensor amplitude, magnetic alignment, hysteresis, interference and signal conditioning can be the limiting factors even if the ADC itself is stable.

Consequently, replacing an ADC IC with discrete circuitry does not automatically reduce cost or improve precision. The op-amp, capacitor, reference, comparator, board layout and development time all become part of the conversion system.

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How to validate a build before trusting its codes

A serious performance claim needs a measured transfer curve and noise behavior, not just a wide output word. Use a known input source and a trusted reference instrument; record conditions and repeat the measurements if temperature or supply changes are relevant.

  1. Check safe operating limits. Confirm that the input stays within the op-amp, comparator and reference ranges, and that startup or overload cannot leave the integrator saturated.
  2. Apply known DC inputs. Step precision voltages across the intended input range and record output codes, including near zero and near the endpoints.
  3. Plot code against voltage. Use the plot to inspect offset, gain and departures from a straight line. Compare measured code steps with the ideal LSB for the actual full-scale span.
  4. Hold the input constant. Collect repeated readings, examine the noise distribution and calculate standard deviation in LSBs. A single smooth display is not a noise measurement.
  5. Measure timing. Record conversion latency and update rate, and inspect integrator, threshold, clock and reset signals for expected behavior.
  6. Repeat under changed conditions. Check supply and temperature variation if those are part of the intended use, then compare results with a trusted meter or reference ADC.

Useful evidence includes a complete schematic and bill of materials, input range and reference, integrator values, clock frequency, counter width, feedback method, reset timing, output format, calibration procedure, scope captures, conversion time, noise histogram and linearity plot. Without those measurements, the circuit remains an instructive project rather than a validated precision instrument.

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Build the circuit or use a commercial ADC?

Need Scratch-built integrating ADC Commercial ADC IC
Learn analog feedback and conversion timing Strong fit: the building blocks are visible and modifiable. Limited visibility into the conversion core.
Documented performance and repeatability Must be measured and calibrated by the builder. Can be selected against published specifications, subject to the data sheet and implementation.
Slow control input Potentially suitable if latency and measured accuracy meet the need. Often straightforward; a microcontroller’s ADC may also suffice.
High-speed sampling Usually a poor fit for a simple integrating build. Choose an architecture and device specified for the required bandwidth.
Development time Higher: analog design, layout, timing and validation are the builder’s responsibility. Lower to moderate, depending on interface and supporting circuitry.
Design flexibility High at the circuit level, with a corresponding validation burden. Bound by the device’s features and operating limits.

For a working rotary-control interface, a commercial ADC or microcontroller ADC is usually the practical starting point. Build the discrete version when understanding the conversion principle is itself a goal and there is time to validate it. For guaranteed precision, select a documented converter whose noise, linearity, drift, reference and rate specifications match the application.

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